drivers/spi/spi-bcm-qspi.c
Source file repositories/reference/linux-study-clean/drivers/spi/spi-bcm-qspi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/spi/spi-bcm-qspi.c- Extension
.c- Size
- 45072 bytes
- Lines
- 1736
- Domain
- Driver Families
- Bucket
- drivers/spi
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/delay.hlinux/device.hlinux/init.hlinux/interrupt.hlinux/io.hlinux/ioport.hlinux/kernel.hlinux/module.hlinux/of.hlinux/of_irq.hlinux/platform_device.hlinux/slab.hlinux/spi/spi.hlinux/mtd/spi-nor.hlinux/sysfs.hlinux/types.hspi-bcm-qspi.h
Detected Declarations
struct bcm_qspi_parmsstruct bcm_xfer_modestruct bcm_qspi_irqstruct bcm_qspi_dev_idstruct qspi_transstruct bcm_qspistruct bcm_qspi_dataenum base_typeenum irq_sourcefunction has_bspifunction bcm_qspi_has_fastbrfunction bcm_qspi_has_sysclk_108function bcm_qspi_spbr_minfunction bcm_qspi_calc_spbrfunction bcm_qspi_readfunction bcm_qspi_writefunction bcm_qspi_bspi_busy_pollfunction bcm_qspi_bspi_ver_threefunction bcm_qspi_bspi_flush_prefetch_buffersfunction bcm_qspi_bspi_lr_is_fifo_emptyfunction bcm_qspi_bspi_lr_read_fifofunction bcm_qspi_bspi_lr_startfunction bcm_qspi_bspi_lr_clearfunction bcm_qspi_bspi_lr_data_readfunction bcm_qspi_bspi_set_xfer_paramsfunction bcm_qspi_bspi_set_flex_modefunction bcm_qspi_bspi_set_overridefunction bcm_qspi_bspi_set_modefunction bcm_qspi_enable_bspifunction bcm_qspi_disable_bspifunction bcm_qspi_chip_selectfunction bcmspi_parms_did_changefunction bcm_qspi_hw_set_parmsfunction bcm_qspi_update_parmsfunction bcm_qspi_setupfunction bcm_qspi_mspi_transfer_is_lastfunction update_qspi_trans_byte_countfunction read_rxram_slot_u8function read_rxram_slot_u16function read_rxram_slot_u32function read_rxram_slot_u64function read_from_hwfunction write_txram_slot_u8function write_txram_slot_u16function write_txram_slot_u32function write_txram_slot_u64function read_cdram_slotfunction write_cdram_slot
Annotated Snippet
struct bcm_qspi_parms {
u32 speed_hz;
u8 mode;
u8 bits_per_word;
};
struct bcm_xfer_mode {
bool flex_mode;
unsigned int width;
unsigned int addrlen;
unsigned int hp;
};
enum base_type {
MSPI,
BSPI,
CHIP_SELECT,
BASEMAX,
};
enum irq_source {
SINGLE_L2,
MUXED_L1,
};
struct bcm_qspi_irq {
const char *irq_name;
const irq_handler_t irq_handler;
int irq_source;
u32 mask;
};
struct bcm_qspi_dev_id {
const struct bcm_qspi_irq *irqp;
void *dev;
};
struct qspi_trans {
struct spi_transfer *trans;
int byte;
bool mspi_last_trans;
};
struct bcm_qspi {
struct platform_device *pdev;
struct spi_controller *host;
struct clk *clk;
u32 base_clk;
u32 max_speed_hz;
void __iomem *base[BASEMAX];
/* Some SoCs provide custom interrupt status register(s) */
struct bcm_qspi_soc_intc *soc_intc;
struct bcm_qspi_parms last_parms;
struct qspi_trans trans_pos;
int curr_cs;
int bspi_maj_rev;
int bspi_min_rev;
int bspi_enabled;
const struct spi_mem_op *bspi_rf_op;
u32 bspi_rf_op_idx;
u32 bspi_rf_op_len;
u32 bspi_rf_op_status;
struct bcm_xfer_mode xfer_mode;
u32 s3_strap_override_ctrl;
bool bspi_mode;
bool big_endian;
int num_irqs;
struct bcm_qspi_dev_id *dev_ids;
struct completion mspi_done;
struct completion bspi_done;
u8 mspi_maj_rev;
u8 mspi_min_rev;
bool mspi_spcr3_sysclk;
};
static inline bool has_bspi(struct bcm_qspi *qspi)
{
return qspi->bspi_mode;
}
/* hardware supports spcr3 and fast baud-rate */
static inline bool bcm_qspi_has_fastbr(struct bcm_qspi *qspi)
{
if (!has_bspi(qspi) &&
((qspi->mspi_maj_rev >= 1) &&
(qspi->mspi_min_rev >= 5)))
return true;
Annotation
- Immediate include surface: `linux/clk.h`, `linux/delay.h`, `linux/device.h`, `linux/init.h`, `linux/interrupt.h`, `linux/io.h`, `linux/ioport.h`, `linux/kernel.h`.
- Detected declarations: `struct bcm_qspi_parms`, `struct bcm_xfer_mode`, `struct bcm_qspi_irq`, `struct bcm_qspi_dev_id`, `struct qspi_trans`, `struct bcm_qspi`, `struct bcm_qspi_data`, `enum base_type`, `enum irq_source`, `function has_bspi`.
- Atlas domain: Driver Families / drivers/spi.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.