drivers/spi/spi-cavium-octeon.c
Source file repositories/reference/linux-study-clean/drivers/spi/spi-cavium-octeon.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/spi/spi-cavium-octeon.c- Extension
.c- Size
- 2333 bytes
- Lines
- 97
- Domain
- Driver Families
- Bucket
- drivers/spi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/platform_device.hlinux/spi/spi.hlinux/module.hlinux/io.hlinux/of.hasm/octeon/octeon.hspi-cavium.h
Detected Declarations
function Copyrightfunction octeon_spi_remove
Annotated Snippet
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/of.h>
#include <asm/octeon/octeon.h>
#include "spi-cavium.h"
static int octeon_spi_probe(struct platform_device *pdev)
{
void __iomem *reg_base;
struct spi_controller *host;
struct octeon_spi *p;
int err = -ENOENT;
host = devm_spi_alloc_host(&pdev->dev, sizeof(struct octeon_spi));
if (!host)
return -ENOMEM;
p = spi_controller_get_devdata(host);
platform_set_drvdata(pdev, host);
reg_base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(reg_base))
return PTR_ERR(reg_base);
p->register_base = reg_base;
p->sys_freq = octeon_get_io_clock_rate();
p->regs.config = 0;
p->regs.status = 0x08;
p->regs.tx = 0x10;
p->regs.data = 0x80;
host->num_chipselect = 4;
host->mode_bits = SPI_CPHA |
SPI_CPOL |
SPI_CS_HIGH |
SPI_LSB_FIRST |
SPI_3WIRE;
host->transfer_one_message = octeon_spi_transfer_one_message;
host->bits_per_word_mask = SPI_BPW_MASK(8);
host->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
err = spi_register_controller(host);
if (err) {
dev_err(&pdev->dev, "register host failed: %d\n", err);
return err;
}
dev_info(&pdev->dev, "OCTEON SPI bus driver\n");
return 0;
}
static void octeon_spi_remove(struct platform_device *pdev)
{
struct spi_controller *host = platform_get_drvdata(pdev);
struct octeon_spi *p = spi_controller_get_devdata(host);
spi_unregister_controller(host);
/* Clear the CSENA* and put everything in a known state. */
writeq(0, p->register_base + OCTEON_SPI_CFG(p));
}
static const struct of_device_id octeon_spi_match[] = {
{ .compatible = "cavium,octeon-3010-spi", },
{},
};
MODULE_DEVICE_TABLE(of, octeon_spi_match);
static struct platform_driver octeon_spi_driver = {
.driver = {
.name = "spi-octeon",
.of_match_table = octeon_spi_match,
},
.probe = octeon_spi_probe,
.remove = octeon_spi_remove,
};
module_platform_driver(octeon_spi_driver);
MODULE_DESCRIPTION("Cavium, Inc. OCTEON SPI bus driver");
MODULE_AUTHOR("David Daney");
MODULE_LICENSE("GPL");
Annotation
- Immediate include surface: `linux/platform_device.h`, `linux/spi/spi.h`, `linux/module.h`, `linux/io.h`, `linux/of.h`, `asm/octeon/octeon.h`, `spi-cavium.h`.
- Detected declarations: `function Copyright`, `function octeon_spi_remove`.
- Atlas domain: Driver Families / drivers/spi.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.