drivers/spi/spi-coldfire-qspi.c
Source file repositories/reference/linux-study-clean/drivers/spi/spi-coldfire-qspi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/spi/spi-coldfire-qspi.c- Extension
.c- Size
- 12715 bytes
- Lines
- 507
- Domain
- Driver Families
- Bucket
- drivers/spi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/module.hlinux/interrupt.hlinux/errno.hlinux/platform_device.hlinux/sched.hlinux/delay.hlinux/io.hlinux/clk.hlinux/err.hlinux/spi/spi.hlinux/pm_runtime.hasm/coldfire.hasm/mcfsim.hasm/mcfqspi.h
Detected Declarations
struct mcfqspifunction mcfqspi_wr_qmrfunction mcfqspi_wr_qdlyrfunction mcfqspi_rd_qdlyrfunction mcfqspi_wr_qwrfunction mcfqspi_wr_qirfunction mcfqspi_wr_qarfunction mcfqspi_wr_qdrfunction mcfqspi_rd_qdrfunction mcfqspi_cs_selectfunction mcfqspi_cs_deselectfunction mcfqspi_cs_setupfunction mcfqspi_cs_teardownfunction mcfqspi_qmr_baudfunction mcfqspi_qdlyr_spefunction mcfqspi_irq_handlerfunction mcfqspi_transfer_msg8function mcfqspi_transfer_msg16function mcfqspi_set_csfunction mcfqspi_transfer_onefunction mcfqspi_setupfunction mcfqspi_probefunction mcfqspi_removefunction mcfqspi_suspendfunction mcfqspi_resumefunction mcfqspi_runtime_suspendfunction mcfqspi_runtime_resume
Annotated Snippet
struct mcfqspi {
void __iomem *iobase;
int irq;
struct clk *clk;
struct mcfqspi_cs_control *cs_control;
wait_queue_head_t waitq;
};
static void mcfqspi_wr_qmr(struct mcfqspi *mcfqspi, u16 val)
{
writew(val, mcfqspi->iobase + MCFQSPI_QMR);
}
static void mcfqspi_wr_qdlyr(struct mcfqspi *mcfqspi, u16 val)
{
writew(val, mcfqspi->iobase + MCFQSPI_QDLYR);
}
static u16 mcfqspi_rd_qdlyr(struct mcfqspi *mcfqspi)
{
return readw(mcfqspi->iobase + MCFQSPI_QDLYR);
}
static void mcfqspi_wr_qwr(struct mcfqspi *mcfqspi, u16 val)
{
writew(val, mcfqspi->iobase + MCFQSPI_QWR);
}
static void mcfqspi_wr_qir(struct mcfqspi *mcfqspi, u16 val)
{
writew(val, mcfqspi->iobase + MCFQSPI_QIR);
}
static void mcfqspi_wr_qar(struct mcfqspi *mcfqspi, u16 val)
{
writew(val, mcfqspi->iobase + MCFQSPI_QAR);
}
static void mcfqspi_wr_qdr(struct mcfqspi *mcfqspi, u16 val)
{
writew(val, mcfqspi->iobase + MCFQSPI_QDR);
}
static u16 mcfqspi_rd_qdr(struct mcfqspi *mcfqspi)
{
return readw(mcfqspi->iobase + MCFQSPI_QDR);
}
static void mcfqspi_cs_select(struct mcfqspi *mcfqspi, u8 chip_select,
bool cs_high)
{
mcfqspi->cs_control->select(mcfqspi->cs_control, chip_select, cs_high);
}
static void mcfqspi_cs_deselect(struct mcfqspi *mcfqspi, u8 chip_select,
bool cs_high)
{
mcfqspi->cs_control->deselect(mcfqspi->cs_control, chip_select, cs_high);
}
static int mcfqspi_cs_setup(struct mcfqspi *mcfqspi)
{
return (mcfqspi->cs_control->setup) ?
mcfqspi->cs_control->setup(mcfqspi->cs_control) : 0;
}
static void mcfqspi_cs_teardown(struct mcfqspi *mcfqspi)
{
if (mcfqspi->cs_control->teardown)
mcfqspi->cs_control->teardown(mcfqspi->cs_control);
}
static u8 mcfqspi_qmr_baud(u32 speed_hz)
{
return clamp((MCFQSPI_BUSCLK + speed_hz - 1) / speed_hz, 2u, 255u);
}
static bool mcfqspi_qdlyr_spe(struct mcfqspi *mcfqspi)
{
return mcfqspi_rd_qdlyr(mcfqspi) & MCFQSPI_QDLYR_SPE;
}
static irqreturn_t mcfqspi_irq_handler(int this_irq, void *dev_id)
{
struct mcfqspi *mcfqspi = dev_id;
/* clear interrupt */
mcfqspi_wr_qir(mcfqspi, MCFQSPI_QIR_SPIFE | MCFQSPI_QIR_SPIF);
wake_up(&mcfqspi->waitq);
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/module.h`, `linux/interrupt.h`, `linux/errno.h`, `linux/platform_device.h`, `linux/sched.h`, `linux/delay.h`, `linux/io.h`.
- Detected declarations: `struct mcfqspi`, `function mcfqspi_wr_qmr`, `function mcfqspi_wr_qdlyr`, `function mcfqspi_rd_qdlyr`, `function mcfqspi_wr_qwr`, `function mcfqspi_wr_qir`, `function mcfqspi_wr_qar`, `function mcfqspi_wr_qdr`, `function mcfqspi_rd_qdr`, `function mcfqspi_cs_select`.
- Atlas domain: Driver Families / drivers/spi.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.