drivers/spi/spi-dln2.c
Source file repositories/reference/linux-study-clean/drivers/spi/spi-dln2.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/spi/spi-dln2.c- Extension
.c- Size
- 20939 bytes
- Lines
- 877
- Domain
- Driver Families
- Bucket
- drivers/spi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/module.hlinux/platform_device.hlinux/property.hlinux/mfd/dln2.hlinux/spi/spi.hlinux/pm_runtime.hlinux/unaligned.h
Detected Declarations
struct dln2_spifunction dln2_spi_enablefunction dln2_spi_cs_setfunction dln2_spi_cs_set_onefunction dln2_spi_cs_enablefunction dln2_spi_cs_enable_allfunction dln2_spi_get_cs_numfunction dln2_spi_get_speedfunction dln2_spi_get_speed_rangefunction dln2_spi_set_speedfunction dln2_spi_set_modefunction dln2_spi_set_bpwfunction dln2_spi_get_supported_frame_sizesfunction dln2_spi_copy_to_buffunction dln2_spi_copy_from_buffunction dln2_spi_write_onefunction dln2_spi_read_onefunction dln2_spi_read_write_onefunction dln2_spi_rdwrfunction dln2_spi_prepare_messagefunction dln2_spi_transfer_setupfunction dln2_spi_transfer_onefunction dln2_spi_probefunction dln2_spi_removefunction dln2_spi_suspendfunction dln2_spi_resumefunction dln2_spi_runtime_suspendfunction dln2_spi_runtime_resume
Annotated Snippet
struct dln2_spi {
struct platform_device *pdev;
struct spi_controller *host;
u8 port;
/*
* This buffer will be used mainly for read/write operations. Since
* they're quite large, we cannot use the stack. Protection is not
* needed because all SPI communication is serialized by the SPI core.
*/
void *buf;
u8 bpw;
u32 speed;
u16 mode;
u8 cs;
};
/*
* Enable/Disable SPI module. The disable command will wait for transfers to
* complete first.
*/
static int dln2_spi_enable(struct dln2_spi *dln2, bool enable)
{
u16 cmd;
struct {
u8 port;
u8 wait_for_completion;
} tx;
unsigned len = sizeof(tx);
tx.port = dln2->port;
if (enable) {
cmd = DLN2_SPI_ENABLE;
len -= sizeof(tx.wait_for_completion);
} else {
tx.wait_for_completion = DLN2_TRANSFERS_WAIT_COMPLETE;
cmd = DLN2_SPI_DISABLE;
}
return dln2_transfer_tx(dln2->pdev, cmd, &tx, len);
}
/*
* Select/unselect multiple CS lines. The selected lines will be automatically
* toggled LOW/HIGH by the board firmware during transfers, provided they're
* enabled first.
*
* Ex: cs_mask = 0x03 -> CS0 & CS1 will be selected and the next WR/RD operation
* will toggle the lines LOW/HIGH automatically.
*/
static int dln2_spi_cs_set(struct dln2_spi *dln2, u8 cs_mask)
{
struct {
u8 port;
u8 cs;
} tx;
tx.port = dln2->port;
/*
* According to Diolan docs, "a slave device can be selected by changing
* the corresponding bit value to 0". The rest must be set to 1. Hence
* the bitwise NOT in front.
*/
tx.cs = ~cs_mask;
return dln2_transfer_tx(dln2->pdev, DLN2_SPI_SET_SS, &tx, sizeof(tx));
}
/*
* Select one CS line. The other lines will be un-selected.
*/
static int dln2_spi_cs_set_one(struct dln2_spi *dln2, u8 cs)
{
return dln2_spi_cs_set(dln2, BIT(cs));
}
/*
* Enable/disable CS lines for usage. The module has to be disabled first.
*/
static int dln2_spi_cs_enable(struct dln2_spi *dln2, u8 cs_mask, bool enable)
{
struct {
u8 port;
u8 cs;
} tx;
u16 cmd;
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/module.h`, `linux/platform_device.h`, `linux/property.h`, `linux/mfd/dln2.h`, `linux/spi/spi.h`, `linux/pm_runtime.h`, `linux/unaligned.h`.
- Detected declarations: `struct dln2_spi`, `function dln2_spi_enable`, `function dln2_spi_cs_set`, `function dln2_spi_cs_set_one`, `function dln2_spi_cs_enable`, `function dln2_spi_cs_enable_all`, `function dln2_spi_get_cs_num`, `function dln2_spi_get_speed`, `function dln2_spi_get_speed_range`, `function dln2_spi_set_speed`.
- Atlas domain: Driver Families / drivers/spi.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.