drivers/spi/spi-fsl-lpspi.c
Source file repositories/reference/linux-study-clean/drivers/spi/spi-fsl-lpspi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/spi/spi-fsl-lpspi.c- Extension
.c- Size
- 26937 bytes
- Lines
- 1078
- Domain
- Driver Families
- Bucket
- drivers/spi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/completion.hlinux/delay.hlinux/dmaengine.hlinux/dma-mapping.hlinux/err.hlinux/interrupt.hlinux/io.hlinux/irq.hlinux/kernel.hlinux/module.hlinux/of.hlinux/pinctrl/consumer.hlinux/platform_device.hlinux/dma/imx-dma.hlinux/pm_runtime.hlinux/slab.hlinux/spi/spi.hlinux/spi/spi_bitbang.hlinux/types.hlinux/minmax.h
Detected Declarations
struct fsl_lpspi_devtype_datastruct lpspi_configstruct fsl_lpspi_datafunction fsl_lpspi_intctrlfunction fsl_lpspi_bytes_per_wordfunction fsl_lpspi_can_dmafunction lpspi_prepare_xfer_hardwarefunction lpspi_unprepare_xfer_hardwarefunction fsl_lpspi_write_tx_fifofunction fsl_lpspi_read_rx_fifofunction fsl_lpspi_set_cmdfunction fsl_lpspi_set_watermarkfunction fsl_lpspi_set_bitratefunction fsl_lpspi_dma_configurefunction fsl_lpspi_configfunction fsl_lpspi_setup_transferfunction fsl_lpspi_prepare_messagefunction fsl_lpspi_target_abortfunction fsl_lpspi_wait_for_completionfunction fsl_lpspi_resetfunction fsl_lpspi_dma_rx_callbackfunction fsl_lpspi_dma_tx_callbackfunction fsl_lpspi_calculate_timeoutfunction fsl_lpspi_dma_transferfunction fsl_lpspi_dma_exitfunction fsl_lpspi_dma_initfunction fsl_lpspi_pio_transferfunction fsl_lpspi_transfer_onefunction fsl_lpspi_isrfunction fsl_lpspi_runtime_resumefunction fsl_lpspi_runtime_suspendfunction fsl_lpspi_init_rpmfunction fsl_lpspi_probefunction fsl_lpspi_removefunction fsl_lpspi_suspendfunction fsl_lpspi_resume
Annotated Snippet
struct fsl_lpspi_devtype_data {
u8 prescale_max : 3; /* 0 == no limit */
bool query_hw_for_num_cs : 1;
};
struct lpspi_config {
u8 bpw;
u8 chip_select;
u8 prescale;
u32 mode;
u32 speed_hz;
u32 effective_speed_hz;
};
struct fsl_lpspi_data {
struct device *dev;
void __iomem *base;
unsigned long base_phys;
struct clk *clk_ipg;
struct clk *clk_per;
bool is_target;
bool is_only_cs1;
bool is_first_byte;
void *rx_buf;
const void *tx_buf;
void (*tx)(struct fsl_lpspi_data *fsl_lpspi);
void (*rx)(struct fsl_lpspi_data *fsl_lpspi);
u32 remain;
u8 watermark;
u8 txfifosize;
u8 rxfifosize;
struct lpspi_config config;
struct completion xfer_done;
bool target_aborted;
/* DMA */
bool usedma;
struct completion dma_rx_completion;
struct completion dma_tx_completion;
const struct fsl_lpspi_devtype_data *devtype_data;
};
/*
* Devices with ERR051608 have a max TCR_PRESCALE value of 1, otherwise there is
* no prescale limit: https://www.nxp.com/docs/en/errata/i.MX93_1P87f.pdf
*/
static const struct fsl_lpspi_devtype_data imx93_lpspi_devtype_data = {
.prescale_max = 1,
.query_hw_for_num_cs = true,
};
static const struct fsl_lpspi_devtype_data imx7ulp_lpspi_devtype_data = {
/* All defaults */
};
static const struct fsl_lpspi_devtype_data s32g_lpspi_devtype_data = {
.query_hw_for_num_cs = true,
};
static const struct of_device_id fsl_lpspi_dt_ids[] = {
{ .compatible = "fsl,imx7ulp-spi", .data = &imx7ulp_lpspi_devtype_data,},
{ .compatible = "fsl,imx93-spi", .data = &imx93_lpspi_devtype_data,},
{ .compatible = "nxp,s32g2-lpspi", .data = &s32g_lpspi_devtype_data,},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, fsl_lpspi_dt_ids);
#define LPSPI_BUF_RX(type) \
static void fsl_lpspi_buf_rx_##type(struct fsl_lpspi_data *fsl_lpspi) \
{ \
unsigned int val = readl(fsl_lpspi->base + IMX7ULP_RDR); \
\
if (fsl_lpspi->rx_buf) { \
*(type *)fsl_lpspi->rx_buf = val; \
fsl_lpspi->rx_buf += sizeof(type); \
} \
}
#define LPSPI_BUF_TX(type) \
static void fsl_lpspi_buf_tx_##type(struct fsl_lpspi_data *fsl_lpspi) \
{ \
type val = 0; \
\
if (fsl_lpspi->tx_buf) { \
val = *(type *)fsl_lpspi->tx_buf; \
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/completion.h`, `linux/delay.h`, `linux/dmaengine.h`, `linux/dma-mapping.h`, `linux/err.h`, `linux/interrupt.h`.
- Detected declarations: `struct fsl_lpspi_devtype_data`, `struct lpspi_config`, `struct fsl_lpspi_data`, `function fsl_lpspi_intctrl`, `function fsl_lpspi_bytes_per_word`, `function fsl_lpspi_can_dma`, `function lpspi_prepare_xfer_hardware`, `function lpspi_unprepare_xfer_hardware`, `function fsl_lpspi_write_tx_fifo`, `function fsl_lpspi_read_rx_fifo`.
- Atlas domain: Driver Families / drivers/spi.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.