drivers/spi/spi-fsl-qspi.c

File Facts

System

Linux kernel

Corpus path

drivers/spi/spi-fsl-qspi.c

Extension

.c

Size

27571 bytes

Lines

1044

Domain

Driver Families

Bucket

drivers/spi

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/bitops.h
• linux/clk.h
• linux/completion.h
• linux/delay.h
• linux/err.h
• linux/errno.h
• linux/interrupt.h
• linux/io.h
• linux/iopoll.h
• linux/jiffies.h
• linux/kernel.h
• linux/module.h
• linux/mutex.h
• linux/of.h
• linux/platform_device.h
• linux/pm_qos.h
• linux/reset.h
• linux/sizes.h
• linux/spi/spi.h
• linux/spi/spi-mem.h

Detected Declarations

• struct fsl_qspi_devtype_data
• struct fsl_qspi
• function needs_swap_endian
• function needs_4x_clock
• function needs_fill_txfifo
• function needs_wakeup_wait_mode
• function needs_amba_base_offset
• function needs_tdh_setting
• function needs_clk_disable
• function fsl_qspi_endian_xchg
• function qspi_writel
• function qspi_readl
• function fsl_qspi_irq_handler
• function fsl_qspi_check_buswidth
• function fsl_qspi_supports_op
• function fsl_qspi_prepare_lut
• function fsl_qspi_clk_prep_enable
• function fsl_qspi_clk_disable_unprep
• function fsl_qspi_invalidate
• function fsl_qspi_select_mem
• function fsl_qspi_read_ahb
• function fsl_qspi_fill_txfifo
• function fsl_qspi_read_rxfifo
• function fsl_qspi_do_op
• function fsl_qspi_readl_poll_tout
• function fsl_qspi_exec_op
• function fsl_qspi_adjust_op_size
• function fsl_qspi_default_setup
• function fsl_qspi_disable
• function fsl_qspi_cleanup
• function fsl_qspi_probe
• function fsl_qspi_suspend
• function fsl_qspi_resume

Annotated Snippet

struct fsl_qspi_devtype_data {
	unsigned int rxfifo;
	unsigned int txfifo;
	int invalid_mstrid;
	unsigned int ahb_buf_size;
	unsigned int sfa_size;
	unsigned int quirks;
	bool little_endian;
};

static const struct fsl_qspi_devtype_data vybrid_data = {
	.rxfifo = SZ_128,
	.txfifo = SZ_64,
	.invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
	.ahb_buf_size = SZ_1K,
	.quirks = QUADSPI_QUIRK_SWAP_ENDIAN,
	.little_endian = true,
};

static const struct fsl_qspi_devtype_data imx6sx_data = {
	.rxfifo = SZ_128,
	.txfifo = SZ_512,
	.invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
	.ahb_buf_size = SZ_1K,
	.quirks = QUADSPI_QUIRK_4X_INT_CLK | QUADSPI_QUIRK_TKT245618,
	.little_endian = true,
};

static const struct fsl_qspi_devtype_data imx7d_data = {
	.rxfifo = SZ_128,
	.txfifo = SZ_512,
	.invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
	.ahb_buf_size = SZ_1K,
	.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK |
		  QUADSPI_QUIRK_USE_TDH_SETTING,
	.little_endian = true,
};

static const struct fsl_qspi_devtype_data imx6ul_data = {
	.rxfifo = SZ_128,
	.txfifo = SZ_512,
	.invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
	.ahb_buf_size = SZ_1K,
	.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK |
		  QUADSPI_QUIRK_USE_TDH_SETTING,
	.little_endian = true,
};

static const struct fsl_qspi_devtype_data ls1021a_data = {
	.rxfifo = SZ_128,
	.txfifo = SZ_64,
	.invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
	.ahb_buf_size = SZ_1K,
	.quirks = 0,
	.little_endian = false,
};

static const struct fsl_qspi_devtype_data ls2080a_data = {
	.rxfifo = SZ_128,
	.txfifo = SZ_64,
	.ahb_buf_size = SZ_1K,
	.invalid_mstrid = 0x0,
	.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_BASE_INTERNAL,
	.little_endian = true,
};

static const struct fsl_qspi_devtype_data spacemit_k1_data = {
	.rxfifo = SZ_128,
	.txfifo = SZ_256,
	.ahb_buf_size = SZ_512,
	.sfa_size = SZ_1K,
	.invalid_mstrid = QUADSPI_BUFXCR_INVALID_MSTRID,
	.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_SKIP_CLK_DISABLE,
	.little_endian = true,
};

struct fsl_qspi {
	void __iomem *iobase;
	void __iomem *ahb_addr;
	const struct fsl_qspi_devtype_data *devtype_data;
	struct mutex lock;
	struct completion c;
	struct reset_control *resets;
	struct clk *clk, *clk_en;
	struct pm_qos_request pm_qos_req;
	struct device *dev;
	int selected;
	u32 memmap_phy;
};

Annotation

• Immediate include surface: `linux/bitops.h`, `linux/clk.h`, `linux/completion.h`, `linux/delay.h`, `linux/err.h`, `linux/errno.h`, `linux/interrupt.h`, `linux/io.h`.
• Detected declarations: `struct fsl_qspi_devtype_data`, `struct fsl_qspi`, `function needs_swap_endian`, `function needs_4x_clock`, `function needs_fill_txfifo`, `function needs_wakeup_wait_mode`, `function needs_amba_base_offset`, `function needs_tdh_setting`, `function needs_clk_disable`, `function fsl_qspi_endian_xchg`.
• Atlas domain: Driver Families / drivers/spi.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.