drivers/spi/spi-pxa2xx.h
Source file repositories/reference/linux-study-clean/drivers/spi/spi-pxa2xx.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/spi/spi-pxa2xx.h- Extension
.h- Size
- 3374 bytes
- Lines
- 142
- Domain
- Driver Families
- Bucket
- drivers/spi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/dmaengine.hlinux/irqreturn.hlinux/types.hlinux/sizes.hlinux/pxa2xx_ssp.h
Detected Declarations
struct devicestruct gpio_descstruct pxa2xx_spi_controllerstruct spi_controllerstruct spi_devicestruct spi_transferstruct driver_datafunction pxa2xx_spi_readfunction pxa2xx_spi_writefunction pxa25x_ssp_compfunction clear_SSCR1_bitsfunction read_SSSR_bitsfunction write_SSSR_CS
Annotated Snippet
struct pxa2xx_spi_controller {
u8 num_chipselect;
u8 enable_dma;
u8 dma_burst_size;
bool is_target;
/* DMA engine specific config */
dma_filter_fn dma_filter;
void *tx_param;
void *rx_param;
/* For non-PXA arches */
struct ssp_device ssp;
};
struct spi_controller;
struct spi_device;
struct spi_transfer;
struct driver_data {
/* SSP Info */
struct ssp_device *ssp;
/* SPI framework hookup */
enum pxa_ssp_type ssp_type;
struct spi_controller *controller;
/* PXA hookup */
struct pxa2xx_spi_controller *controller_info;
/* SSP masks*/
u32 dma_cr1;
u32 int_cr1;
u32 clear_sr;
u32 mask_sr;
/* DMA engine support */
atomic_t dma_running;
/* Current transfer state info */
void *tx;
void *tx_end;
void *rx;
void *rx_end;
u8 n_bytes;
int (*write)(struct driver_data *drv_data);
int (*read)(struct driver_data *drv_data);
irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
void __iomem *lpss_base;
/* Optional slave FIFO ready signal */
struct gpio_desc *gpiod_ready;
};
static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data, u32 reg)
{
return pxa_ssp_read_reg(drv_data->ssp, reg);
}
static inline void pxa2xx_spi_write(const struct driver_data *drv_data, u32 reg, u32 val)
{
pxa_ssp_write_reg(drv_data->ssp, reg, val);
}
#define DMA_ALIGNMENT 8
static inline int pxa25x_ssp_comp(const struct driver_data *drv_data)
{
switch (drv_data->ssp_type) {
case PXA25x_SSP:
case CE4100_SSP:
case QUARK_X1000_SSP:
return 1;
default:
return 0;
}
}
static inline void clear_SSCR1_bits(const struct driver_data *drv_data, u32 bits)
{
pxa2xx_spi_write(drv_data, SSCR1, pxa2xx_spi_read(drv_data, SSCR1) & ~bits);
}
static inline u32 read_SSSR_bits(const struct driver_data *drv_data, u32 bits)
{
return pxa2xx_spi_read(drv_data, SSSR) & bits;
}
static inline void write_SSSR_CS(const struct driver_data *drv_data, u32 val)
Annotation
- Immediate include surface: `linux/dmaengine.h`, `linux/irqreturn.h`, `linux/types.h`, `linux/sizes.h`, `linux/pxa2xx_ssp.h`.
- Detected declarations: `struct device`, `struct gpio_desc`, `struct pxa2xx_spi_controller`, `struct spi_controller`, `struct spi_device`, `struct spi_transfer`, `struct driver_data`, `function pxa2xx_spi_read`, `function pxa2xx_spi_write`, `function pxa25x_ssp_comp`.
- Atlas domain: Driver Families / drivers/spi.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.