drivers/spi/spi-qpic-snand.c
Source file repositories/reference/linux-study-clean/drivers/spi/spi-qpic-snand.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/spi/spi-qpic-snand.c- Extension
.c- Size
- 46747 bytes
- Lines
- 1649
- Domain
- Driver Families
- Bucket
- drivers/spi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/clk.hlinux/delay.hlinux/dmaengine.hlinux/dma-mapping.hlinux/dma/qcom_adm.hlinux/dma/qcom_bam_dma.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/slab.hlinux/mtd/nand-qpic-common.hlinux/mtd/spinand.hlinux/bitfield.h
Detected Declarations
struct snandc_read_statusstruct qcom_ecc_statsstruct qpic_eccstruct qpic_spi_nandfunction qcom_spi_set_read_loc_firstfunction qcom_spi_set_read_loc_lastfunction qcom_spi_initfunction qcom_spi_ooblayout_eccfunction qcom_spi_ooblayout_freefunction qcom_spi_ecc_init_ctx_pipelinedfunction qcom_spi_ecc_cleanup_ctx_pipelinedfunction qcom_spi_ecc_prepare_io_req_pipelinedfunction qcom_spi_ecc_finish_io_req_pipelinedfunction qcom_spi_set_read_locfunction qcom_spi_config_cw_readfunction qcom_spi_block_erasefunction qcom_spi_config_single_cw_page_readfunction qcom_spi_check_raw_flash_errorsfunction qcom_spi_read_last_cwfunction qcom_spi_check_errorfunction qcom_spi_read_cw_rawfunction qcom_spi_read_page_rawfunction qcom_spi_read_page_eccfunction qcom_spi_read_page_oobfunction qcom_spi_read_pagefunction qcom_spi_config_page_writefunction qcom_spi_config_cw_writefunction qcom_spi_program_rawfunction qcom_spi_program_eccfunction qcom_spi_program_oobfunction qcom_spi_program_executefunction qcom_spi_cmd_mappingfunction qcom_spi_write_pagefunction qcom_spi_send_cmdaddrfunction qcom_spi_io_opfunction qcom_spi_is_page_opfunction qcom_spi_supports_opfunction qcom_spi_exec_opfunction qcom_spi_probefunction qcom_spi_remove
Annotated Snippet
struct snandc_read_status {
__le32 snandc_flash;
__le32 snandc_buffer;
__le32 snandc_erased_cw;
};
/*
* ECC state struct
* @corrected: ECC corrected
* @bitflips: Max bit flip
* @failed: ECC failed
*/
struct qcom_ecc_stats {
u32 corrected;
u32 bitflips;
u32 failed;
};
struct qpic_ecc {
int ecc_bytes_hw;
int spare_bytes;
int bbm_size;
int ecc_mode;
int bytes;
int steps;
int step_size;
int strength;
int cw_size;
int cw_data;
u32 cfg0;
u32 cfg1;
u32 cfg0_raw;
u32 cfg1_raw;
u32 ecc_buf_cfg;
u32 ecc_bch_cfg;
bool bch_enabled;
};
struct qpic_spi_nand {
struct qcom_nand_controller *snandc;
struct spi_controller *ctlr;
struct mtd_info *mtd;
struct clk *iomacro_clk;
struct qpic_ecc *ecc;
struct qcom_ecc_stats ecc_stats;
struct nand_ecc_engine ecc_eng;
u8 *data_buf;
u8 *oob_buf;
__le32 addr1;
__le32 addr2;
__le32 cmd;
u32 num_cw;
bool oob_rw;
bool page_rw;
bool raw_rw;
};
static void qcom_spi_set_read_loc_first(struct qcom_nand_controller *snandc,
int reg, int cw_offset, int read_size,
int is_last_read_loc)
{
__le32 locreg_val;
u32 val = FIELD_PREP(READ_LOCATION_OFFSET_MASK, cw_offset) |
FIELD_PREP(READ_LOCATION_SIZE_MASK, read_size) |
FIELD_PREP(READ_LOCATION_LAST_MASK, is_last_read_loc);
locreg_val = cpu_to_le32(val);
if (reg == NAND_READ_LOCATION_0)
snandc->regs->read_location0 = locreg_val;
else if (reg == NAND_READ_LOCATION_1)
snandc->regs->read_location1 = locreg_val;
else if (reg == NAND_READ_LOCATION_2)
snandc->regs->read_location2 = locreg_val;
else if (reg == NAND_READ_LOCATION_3)
snandc->regs->read_location3 = locreg_val;
}
static void qcom_spi_set_read_loc_last(struct qcom_nand_controller *snandc,
int reg, int cw_offset, int read_size,
int is_last_read_loc)
{
__le32 locreg_val;
u32 val = FIELD_PREP(READ_LOCATION_OFFSET_MASK, cw_offset) |
FIELD_PREP(READ_LOCATION_SIZE_MASK, read_size) |
FIELD_PREP(READ_LOCATION_LAST_MASK, is_last_read_loc);
locreg_val = cpu_to_le32(val);
if (reg == NAND_READ_LOCATION_LAST_CW_0)
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/clk.h`, `linux/delay.h`, `linux/dmaengine.h`, `linux/dma-mapping.h`, `linux/dma/qcom_adm.h`, `linux/dma/qcom_bam_dma.h`, `linux/module.h`.
- Detected declarations: `struct snandc_read_status`, `struct qcom_ecc_stats`, `struct qpic_ecc`, `struct qpic_spi_nand`, `function qcom_spi_set_read_loc_first`, `function qcom_spi_set_read_loc_last`, `function qcom_spi_init`, `function qcom_spi_ooblayout_ecc`, `function qcom_spi_ooblayout_free`, `function qcom_spi_ecc_init_ctx_pipelined`.
- Atlas domain: Driver Families / drivers/spi.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.