drivers/spi/spi-rzv2m-csi.c
Source file repositories/reference/linux-study-clean/drivers/spi/spi-rzv2m-csi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/spi/spi-rzv2m-csi.c- Extension
.c- Size
- 18184 bytes
- Lines
- 695
- Domain
- Driver Families
- Bucket
- drivers/spi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bits.hlinux/clk.hlinux/count_zeros.hlinux/interrupt.hlinux/iopoll.hlinux/log2.hlinux/of.hlinux/platform_device.hlinux/property.hlinux/reset.hlinux/spi/spi.hlinux/units.h
Detected Declarations
struct rzv2m_csi_privfunction rzv2m_csi_reg_write_bitfunction rzv2m_csi_sw_resetfunction rzv2m_csi_start_stop_operationfunction rzv2m_csi_fill_txfifofunction rzv2m_csi_read_rxfifofunction rzv2m_csi_empty_rxfifofunction rzv2m_csi_calc_current_transferfunction rzv2m_csi_set_rx_fifo_trigger_levelfunction rzv2m_csi_enable_rx_triggerfunction rzv2m_csi_disable_irqsfunction rzv2m_csi_disable_all_irqsfunction rzv2m_csi_clear_irqsfunction rzv2m_csi_clear_all_irqsfunction rzv2m_csi_enable_irqsfunction rzv2m_csi_wait_for_interruptfunction rzv2m_csi_wait_for_rx_readyfunction rzv2m_csi_irq_handlerfunction rzv2m_csi_setup_clockfunction rzv2m_csi_setup_operating_modefunction rzv2m_csi_setupfunction rzv2m_csi_pio_transferfunction rzv2m_csi_transfer_onefunction rzv2m_csi_target_abortfunction rzv2m_csi_probefunction rzv2m_csi_remove
Annotated Snippet
struct rzv2m_csi_priv {
void __iomem *base;
struct clk *csiclk;
struct clk *pclk;
struct device *dev;
struct spi_controller *controller;
const void *txbuf;
void *rxbuf;
unsigned int buffer_len;
unsigned int bytes_sent;
unsigned int bytes_received;
unsigned int bytes_to_transfer;
unsigned int words_to_transfer;
unsigned int bytes_per_word;
wait_queue_head_t wait;
u32 errors;
u32 status;
bool target_aborted;
bool use_ss_pin;
};
static void rzv2m_csi_reg_write_bit(const struct rzv2m_csi_priv *csi,
int reg_offs, int bit_mask, u32 value)
{
int nr_zeros;
u32 tmp;
nr_zeros = count_trailing_zeros(bit_mask);
value <<= nr_zeros;
tmp = (readl(csi->base + reg_offs) & ~bit_mask) | value;
writel(tmp, csi->base + reg_offs);
}
static int rzv2m_csi_sw_reset(struct rzv2m_csi_priv *csi, int assert)
{
u32 reg;
rzv2m_csi_reg_write_bit(csi, CSI_CNT, CSI_CNT_CSIRST, assert);
if (!assert)
return 0;
return readl_poll_timeout(csi->base + CSI_MODE, reg,
!(reg & CSI_MODE_CSOT), 0,
CSI_EN_DIS_TIMEOUT_US);
}
static int rzv2m_csi_start_stop_operation(const struct rzv2m_csi_priv *csi,
int enable, bool wait)
{
u32 reg;
rzv2m_csi_reg_write_bit(csi, CSI_MODE, CSI_MODE_CSIE, enable);
if (enable || !wait)
return 0;
return readl_poll_timeout(csi->base + CSI_MODE, reg,
!(reg & CSI_MODE_CSOT), 0,
CSI_EN_DIS_TIMEOUT_US);
}
static int rzv2m_csi_fill_txfifo(struct rzv2m_csi_priv *csi)
{
unsigned int i;
if (readl(csi->base + CSI_OFIFOL))
return -EIO;
if (csi->bytes_per_word == 2) {
const u16 *buf = csi->txbuf;
for (i = 0; i < csi->words_to_transfer; i++)
writel(buf[i], csi->base + CSI_OFIFO);
} else {
const u8 *buf = csi->txbuf;
for (i = 0; i < csi->words_to_transfer; i++)
writel(buf[i], csi->base + CSI_OFIFO);
}
csi->txbuf += csi->bytes_to_transfer;
csi->bytes_sent += csi->bytes_to_transfer;
return 0;
}
static int rzv2m_csi_read_rxfifo(struct rzv2m_csi_priv *csi)
{
Annotation
- Immediate include surface: `linux/bits.h`, `linux/clk.h`, `linux/count_zeros.h`, `linux/interrupt.h`, `linux/iopoll.h`, `linux/log2.h`, `linux/of.h`, `linux/platform_device.h`.
- Detected declarations: `struct rzv2m_csi_priv`, `function rzv2m_csi_reg_write_bit`, `function rzv2m_csi_sw_reset`, `function rzv2m_csi_start_stop_operation`, `function rzv2m_csi_fill_txfifo`, `function rzv2m_csi_read_rxfifo`, `function rzv2m_csi_empty_rxfifo`, `function rzv2m_csi_calc_current_transfer`, `function rzv2m_csi_set_rx_fifo_trigger_level`, `function rzv2m_csi_enable_rx_trigger`.
- Atlas domain: Driver Families / drivers/spi.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.