drivers/spi/spi-s3c64xx.c
Source file repositories/reference/linux-study-clean/drivers/spi/spi-s3c64xx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/spi/spi-s3c64xx.c- Extension
.c- Size
- 46202 bytes
- Lines
- 1672
- Domain
- Driver Families
- Bucket
- drivers/spi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/bits.hlinux/clk.hlinux/delay.hlinux/dma-mapping.hlinux/dmaengine.hlinux/init.hlinux/interrupt.hlinux/io.hlinux/module.hlinux/of.hlinux/platform_data/spi-s3c64xx.hlinux/platform_device.hlinux/pm_runtime.hlinux/spi/spi.hlinux/types.h
Detected Declarations
struct s3c64xx_spi_dma_datastruct s3c64xx_spi_port_configstruct s3c64xx_spi_driver_datafunction s3c64xx_flush_fifofunction s3c64xx_spi_dmacbfunction s3c64xx_prepare_dmafunction s3c64xx_spi_set_csfunction s3c64xx_spi_prepare_transferfunction s3c64xx_spi_unprepare_transferfunction s3c64xx_spi_can_dmafunction s3c64xx_iowrite8_32_repfunction s3c64xx_iowrite16_32_repfunction s3c64xx_iowrite_repfunction s3c64xx_enable_datapathfunction s3c64xx_spi_wait_for_timeoutfunction s3c64xx_wait_for_dmafunction Rxfunction s3c64xx_wait_for_piofunction s3c64xx_spi_configfunction s3c64xx_spi_prepare_messagefunction s3c64xx_spi_max_transfer_sizefunction s3c64xx_spi_transfer_onefunction s3c64xx_spi_setupfunction s3c64xx_spi_cleanupfunction s3c64xx_spi_irqfunction s3c64xx_spi_hwinitfunction s3c64xx_spi_set_port_idfunction s3c64xx_spi_set_fifomaskfunction s3c64xx_spi_probefunction s3c64xx_spi_removefunction s3c64xx_spi_suspendfunction s3c64xx_spi_resumefunction s3c64xx_spi_runtime_suspendfunction s3c64xx_spi_runtime_resume
Annotated Snippet
struct s3c64xx_spi_dma_data {
struct dma_chan *ch;
dma_cookie_t cookie;
enum dma_transfer_direction direction;
};
/**
* struct s3c64xx_spi_port_config - SPI Controller hardware info
* @fifo_lvl_mask: [DEPRECATED] use @{rx, tx}_fifomask instead.
* @rx_lvl_offset: [DEPRECATED] use @{rx,tx}_fifomask instead.
* @fifo_depth: depth of the FIFOs. Used by compatibles where all the instances
* of the IP define the same FIFO depth. It has higher precedence
* than the FIFO depth specified via DT.
* @rx_fifomask: SPI_STATUS.RX_FIFO_LVL mask. Shifted mask defining the field's
* length and position.
* @tx_fifomask: SPI_STATUS.TX_FIFO_LVL mask. Shifted mask defining the field's
* length and position.
* @tx_st_done: Bit offset of TX_DONE bit in SPI_STATUS regiter.
* @clk_div: Internal clock divider
* @quirks: Bitmask of known quirks
* @high_speed: True, if the controller supports HIGH_SPEED_EN bit.
* @clk_from_cmu: True, if the controller does not include a clock mux and
* prescaler unit.
* @clk_ioclk: True if clock is present on this device
* @has_loopback: True if loopback mode can be supported
* @use_32bit_io: True if the SoC allows only 32-bit register accesses.
*
* The Samsung s3c64xx SPI controller are used on various Samsung SoC's but
* differ in some aspects such as the size of the fifo and spi bus clock
* setup. Such differences are specified to the driver using this structure
* which is provided as driver data to the driver.
*/
struct s3c64xx_spi_port_config {
int fifo_lvl_mask[MAX_SPI_PORTS];
int rx_lvl_offset;
unsigned int fifo_depth;
u32 rx_fifomask;
u32 tx_fifomask;
int tx_st_done;
int quirks;
int clk_div;
bool high_speed;
bool clk_from_cmu;
bool clk_ioclk;
bool has_loopback;
bool use_32bit_io;
};
/**
* struct s3c64xx_spi_driver_data - Runtime info holder for SPI driver.
* @clk: Pointer to the spi clock.
* @src_clk: Pointer to the clock used to generate SPI signals.
* @ioclk: Pointer to the i/o clock between host and target
* @pdev: Pointer to device's platform device data
* @host: Pointer to the SPI Protocol host.
* @cntrlr_info: Platform specific data for the controller this driver manages.
* @lock: Controller specific lock.
* @state: Set of FLAGS to indicate status.
* @sfr_start: BUS address of SPI controller regs.
* @regs: Pointer to ioremap'ed controller registers.
* @xfer_completion: To indicate completion of xfer task.
* @cur_mode: Stores the active configuration of the controller.
* @cur_bpw: Stores the active bits per word settings.
* @cur_speed: Current clock speed
* @rx_dma: Local receive DMA data (e.g. chan and direction)
* @tx_dma: Local transmit DMA data (e.g. chan and direction)
* @port_conf: Local SPI port configuration data
* @port_id: [DEPRECATED] use @{rx,tx}_fifomask instead.
* @fifo_depth: depth of the FIFO.
* @rx_fifomask: SPI_STATUS.RX_FIFO_LVL mask. Shifted mask defining the field's
* length and position.
* @tx_fifomask: SPI_STATUS.TX_FIFO_LVL mask. Shifted mask defining the field's
* length and position.
*/
struct s3c64xx_spi_driver_data {
void __iomem *regs;
struct clk *clk;
struct clk *src_clk;
struct clk *ioclk;
struct platform_device *pdev;
struct spi_controller *host;
struct s3c64xx_spi_info *cntrlr_info;
spinlock_t lock;
unsigned long sfr_start;
struct completion xfer_completion;
unsigned state;
unsigned cur_mode, cur_bpw;
unsigned cur_speed;
struct s3c64xx_spi_dma_data rx_dma;
struct s3c64xx_spi_dma_data tx_dma;
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/bits.h`, `linux/clk.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/dmaengine.h`, `linux/init.h`, `linux/interrupt.h`.
- Detected declarations: `struct s3c64xx_spi_dma_data`, `struct s3c64xx_spi_port_config`, `struct s3c64xx_spi_driver_data`, `function s3c64xx_flush_fifo`, `function s3c64xx_spi_dmacb`, `function s3c64xx_prepare_dma`, `function s3c64xx_spi_set_cs`, `function s3c64xx_spi_prepare_transfer`, `function s3c64xx_spi_unprepare_transfer`, `function s3c64xx_spi_can_dma`.
- Atlas domain: Driver Families / drivers/spi.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.