drivers/spi/spi-tegra20-sflash.c
Source file repositories/reference/linux-study-clean/drivers/spi/spi-tegra20-sflash.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/spi/spi-tegra20-sflash.c- Extension
.c- Size
- 15966 bytes
- Lines
- 608
- Domain
- Driver Families
- Bucket
- drivers/spi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/completion.hlinux/delay.hlinux/err.hlinux/interrupt.hlinux/io.hlinux/kernel.hlinux/kthread.hlinux/module.hlinux/platform_device.hlinux/pm_runtime.hlinux/of.hlinux/of_device.hlinux/reset.hlinux/spi/spi.h
Detected Declarations
struct tegra_sflash_datafunction tegra_sflash_readlfunction tegra_sflash_writelfunction tegra_sflash_clear_statusfunction tegra_sflash_calculate_curr_xfer_paramfunction tegra_sflash_fill_tx_fifo_from_client_txbuffunction tegra_sflash_read_rx_fifo_to_client_rxbuffunction tegra_sflash_start_cpu_based_transferfunction tegra_sflash_start_transfer_onefunction tegra_sflash_transfer_one_messagefunction handle_cpu_based_xferfunction tegra_sflash_isrfunction tegra_sflash_probefunction tegra_sflash_removefunction tegra_sflash_suspendfunction tegra_sflash_resumefunction tegra_sflash_runtime_suspendfunction tegra_sflash_runtime_resume
Annotated Snippet
struct tegra_sflash_data {
struct device *dev;
struct spi_controller *host;
spinlock_t lock;
struct clk *clk;
struct reset_control *rst;
void __iomem *base;
unsigned irq;
u32 cur_speed;
struct spi_device *cur_spi;
unsigned cur_pos;
unsigned cur_len;
unsigned bytes_per_word;
unsigned cur_direction;
unsigned curr_xfer_words;
unsigned cur_rx_pos;
unsigned cur_tx_pos;
u32 tx_status;
u32 rx_status;
u32 status_reg;
u32 def_command_reg;
u32 command_reg;
u32 dma_control_reg;
struct completion xfer_completion;
struct spi_transfer *curr_xfer;
};
static int tegra_sflash_runtime_suspend(struct device *dev);
static int tegra_sflash_runtime_resume(struct device *dev);
static inline u32 tegra_sflash_readl(struct tegra_sflash_data *tsd,
unsigned long reg)
{
return readl(tsd->base + reg);
}
static inline void tegra_sflash_writel(struct tegra_sflash_data *tsd,
u32 val, unsigned long reg)
{
writel(val, tsd->base + reg);
}
static void tegra_sflash_clear_status(struct tegra_sflash_data *tsd)
{
/* Write 1 to clear status register */
tegra_sflash_writel(tsd, SPI_RDY | SPI_FIFO_ERROR, SPI_STATUS);
}
static unsigned tegra_sflash_calculate_curr_xfer_param(
struct spi_device *spi, struct tegra_sflash_data *tsd,
struct spi_transfer *t)
{
unsigned remain_len = t->len - tsd->cur_pos;
unsigned max_word;
tsd->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
max_word = remain_len / tsd->bytes_per_word;
if (max_word > SPI_FIFO_DEPTH)
max_word = SPI_FIFO_DEPTH;
tsd->curr_xfer_words = max_word;
return max_word;
}
static unsigned tegra_sflash_fill_tx_fifo_from_client_txbuf(
struct tegra_sflash_data *tsd, struct spi_transfer *t)
{
unsigned nbytes;
u32 status;
unsigned max_n_32bit = tsd->curr_xfer_words;
u8 *tx_buf = (u8 *)t->tx_buf + tsd->cur_tx_pos;
if (max_n_32bit > SPI_FIFO_DEPTH)
max_n_32bit = SPI_FIFO_DEPTH;
nbytes = max_n_32bit * tsd->bytes_per_word;
status = tegra_sflash_readl(tsd, SPI_STATUS);
while (!(status & SPI_TXF_FULL)) {
int i;
u32 x = 0;
for (i = 0; nbytes && (i < tsd->bytes_per_word);
i++, nbytes--)
x |= (u32)(*tx_buf++) << (i * 8);
tegra_sflash_writel(tsd, x, SPI_TX_FIFO);
Annotation
- Immediate include surface: `linux/clk.h`, `linux/completion.h`, `linux/delay.h`, `linux/err.h`, `linux/interrupt.h`, `linux/io.h`, `linux/kernel.h`, `linux/kthread.h`.
- Detected declarations: `struct tegra_sflash_data`, `function tegra_sflash_readl`, `function tegra_sflash_writel`, `function tegra_sflash_clear_status`, `function tegra_sflash_calculate_curr_xfer_param`, `function tegra_sflash_fill_tx_fifo_from_client_txbuf`, `function tegra_sflash_read_rx_fifo_to_client_rxbuf`, `function tegra_sflash_start_cpu_based_transfer`, `function tegra_sflash_start_transfer_one`, `function tegra_sflash_transfer_one_message`.
- Atlas domain: Driver Families / drivers/spi.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.