drivers/spi/spi-xilinx.c
Source file repositories/reference/linux-study-clean/drivers/spi/spi-xilinx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/spi/spi-xilinx.c- Extension
.c- Size
- 14984 bytes
- Lines
- 547
- Domain
- Driver Families
- Bucket
- drivers/spi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/interrupt.hlinux/of.hlinux/platform_device.hlinux/spi/spi.hlinux/spi/spi_bitbang.hlinux/spi/xilinx_spi.hlinux/io.h
Detected Declarations
struct xilinx_spifunction xspi_write32function xspi_read32function xspi_write32_befunction xspi_read32_befunction xilinx_spi_txfunction xilinx_spi_rxfunction xspi_init_hwfunction xilinx_spi_chipselectfunction txrx_bufsfunction xilinx_spi_txrx_bufsfunction xilinx_spi_irqfunction xilinx_spi_find_buffer_sizefunction xilinx_spi_probefunction xilinx_spi_remove
Annotated Snippet
struct xilinx_spi {
/* bitbang has to be first */
struct spi_bitbang bitbang;
struct completion done;
void __iomem *regs; /* virt. address of the control registers */
int irq;
bool force_irq; /* force irq to setup host inhibit */
u8 *rx_ptr; /* pointer in the Tx buffer */
const u8 *tx_ptr; /* pointer in the Rx buffer */
u8 bytes_per_word;
int buffer_size; /* buffer size in words */
u32 cs_inactive; /* Level of the CS pins when inactive*/
unsigned int (*read_fn)(void __iomem *addr);
void (*write_fn)(u32 val, void __iomem *addr);
};
static void xspi_write32(u32 val, void __iomem *addr)
{
iowrite32(val, addr);
}
static unsigned int xspi_read32(void __iomem *addr)
{
return ioread32(addr);
}
static void xspi_write32_be(u32 val, void __iomem *addr)
{
iowrite32be(val, addr);
}
static unsigned int xspi_read32_be(void __iomem *addr)
{
return ioread32be(addr);
}
static void xilinx_spi_tx(struct xilinx_spi *xspi)
{
u32 data = 0;
if (!xspi->tx_ptr) {
xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET);
return;
}
switch (xspi->bytes_per_word) {
case 1:
data = *(u8 *)(xspi->tx_ptr);
break;
case 2:
data = *(u16 *)(xspi->tx_ptr);
break;
case 4:
data = *(u32 *)(xspi->tx_ptr);
break;
}
xspi->write_fn(data, xspi->regs + XSPI_TXD_OFFSET);
xspi->tx_ptr += xspi->bytes_per_word;
}
static void xilinx_spi_rx(struct xilinx_spi *xspi)
{
u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET);
if (!xspi->rx_ptr)
return;
switch (xspi->bytes_per_word) {
case 1:
*(u8 *)(xspi->rx_ptr) = data;
break;
case 2:
*(u16 *)(xspi->rx_ptr) = data;
break;
case 4:
*(u32 *)(xspi->rx_ptr) = data;
break;
}
xspi->rx_ptr += xspi->bytes_per_word;
}
static void xspi_init_hw(struct xilinx_spi *xspi)
{
void __iomem *regs_base = xspi->regs;
/* Reset the SPI device */
xspi->write_fn(XIPIF_V123B_RESET_MASK,
Annotation
- Immediate include surface: `linux/module.h`, `linux/interrupt.h`, `linux/of.h`, `linux/platform_device.h`, `linux/spi/spi.h`, `linux/spi/spi_bitbang.h`, `linux/spi/xilinx_spi.h`, `linux/io.h`.
- Detected declarations: `struct xilinx_spi`, `function xspi_write32`, `function xspi_read32`, `function xspi_write32_be`, `function xspi_read32_be`, `function xilinx_spi_tx`, `function xilinx_spi_rx`, `function xspi_init_hw`, `function xilinx_spi_chipselect`, `function txrx_bufs`.
- Atlas domain: Driver Families / drivers/spi.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.