drivers/staging/fbtft/fb_ili9340.c
Source file repositories/reference/linux-study-clean/drivers/staging/fbtft/fb_ili9340.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/fbtft/fb_ili9340.c- Extension
.c- Size
- 2869 bytes
- Lines
- 128
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/kernel.hlinux/init.hlinux/delay.hvideo/mipi_display.hfbtft.h
Detected Declarations
function Copyrightfunction set_var
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* FB driver for the ILI9340 LCD Controller
*
* Copyright (C) 2013 Noralf Tronnes
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <video/mipi_display.h>
#include "fbtft.h"
#define DRVNAME "fb_ili9340"
#define WIDTH 240
#define HEIGHT 320
/* Init sequence taken from: Arduino Library for the Adafruit 2.2" display */
static int init_display(struct fbtft_par *par)
{
par->fbtftops.reset(par);
write_reg(par, 0xEF, 0x03, 0x80, 0x02);
write_reg(par, 0xCF, 0x00, 0XC1, 0X30);
write_reg(par, 0xED, 0x64, 0x03, 0X12, 0X81);
write_reg(par, 0xE8, 0x85, 0x00, 0x78);
write_reg(par, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02);
write_reg(par, 0xF7, 0x20);
write_reg(par, 0xEA, 0x00, 0x00);
/* Power Control 1 */
write_reg(par, 0xC0, 0x23);
/* Power Control 2 */
write_reg(par, 0xC1, 0x10);
/* VCOM Control 1 */
write_reg(par, 0xC5, 0x3e, 0x28);
/* VCOM Control 2 */
write_reg(par, 0xC7, 0x86);
/* COLMOD: Pixel Format Set */
/* 16 bits/pixel */
write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
/* Frame Rate Control */
/* Division ratio = fosc, Frame Rate = 79Hz */
write_reg(par, 0xB1, 0x00, 0x18);
/* Display Function Control */
write_reg(par, 0xB6, 0x08, 0x82, 0x27);
/* Gamma Function Disable */
write_reg(par, 0xF2, 0x00);
/* Gamma curve selection */
write_reg(par, MIPI_DCS_SET_GAMMA_CURVE, 0x01);
/* Positive Gamma Correction */
write_reg(par, 0xE0,
0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, 0x4E, 0xF1,
0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00);
/* Negative Gamma Correction */
write_reg(par, 0xE1,
0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, 0x31, 0xC1,
0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F);
write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
mdelay(120);
write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
return 0;
}
#define ILI9340_MADCTL_MV 0x20
#define ILI9340_MADCTL_MX 0x40
#define ILI9340_MADCTL_MY 0x80
static int set_var(struct fbtft_par *par)
{
u8 val;
switch (par->info->var.rotate) {
case 270:
val = ILI9340_MADCTL_MV;
Annotation
- Immediate include surface: `linux/module.h`, `linux/kernel.h`, `linux/init.h`, `linux/delay.h`, `video/mipi_display.h`, `fbtft.h`.
- Detected declarations: `function Copyright`, `function set_var`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.