drivers/staging/greybus/pwm.c
Source file repositories/reference/linux-study-clean/drivers/staging/greybus/pwm.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/greybus/pwm.c- Extension
.c- Size
- 7730 bytes
- Lines
- 332
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/module.hlinux/slab.hlinux/pwm.hlinux/greybus.hgbphy.h
Detected Declarations
struct gb_pwm_chipfunction gb_pwm_get_npwmfunction gb_pwm_activate_operationfunction gb_pwm_deactivate_operationfunction gb_pwm_config_operationfunction gb_pwm_set_polarity_operationfunction gb_pwm_enable_operationfunction gb_pwm_disable_operationfunction gb_pwm_requestfunction gb_pwm_freefunction gb_pwm_applyfunction gb_pwm_probefunction gb_pwm_remove
Annotated Snippet
struct gb_pwm_chip {
struct gb_connection *connection;
struct pwm_chip chip;
};
static inline struct gb_pwm_chip *pwm_chip_to_gb_pwm_chip(struct pwm_chip *chip)
{
return container_of(chip, struct gb_pwm_chip, chip);
}
static int gb_pwm_get_npwm(struct gb_connection *connection)
{
struct gb_pwm_count_response response;
int ret;
ret = gb_operation_sync(connection, GB_PWM_TYPE_PWM_COUNT,
NULL, 0, &response, sizeof(response));
if (ret)
return ret;
/*
* The request returns the highest allowed PWM id parameter. So add one
* to get the number of PWMs.
*/
return response.count + 1;
}
static int gb_pwm_activate_operation(struct pwm_chip *chip, u8 which)
{
struct gb_pwm_chip *pwmc = pwm_chip_to_gb_pwm_chip(chip);
struct gb_pwm_activate_request request;
struct gbphy_device *gbphy_dev;
int ret;
request.which = which;
gbphy_dev = to_gbphy_dev(pwmchip_parent(chip));
ret = gbphy_runtime_get_sync(gbphy_dev);
if (ret)
return ret;
ret = gb_operation_sync(pwmc->connection, GB_PWM_TYPE_ACTIVATE,
&request, sizeof(request), NULL, 0);
gbphy_runtime_put_autosuspend(gbphy_dev);
return ret;
}
static int gb_pwm_deactivate_operation(struct pwm_chip *chip, u8 which)
{
struct gb_pwm_chip *pwmc = pwm_chip_to_gb_pwm_chip(chip);
struct gb_pwm_deactivate_request request;
struct gbphy_device *gbphy_dev;
int ret;
request.which = which;
gbphy_dev = to_gbphy_dev(pwmchip_parent(chip));
ret = gbphy_runtime_get_sync(gbphy_dev);
if (ret)
return ret;
ret = gb_operation_sync(pwmc->connection, GB_PWM_TYPE_DEACTIVATE,
&request, sizeof(request), NULL, 0);
gbphy_runtime_put_autosuspend(gbphy_dev);
return ret;
}
static int gb_pwm_config_operation(struct pwm_chip *chip,
u8 which, u32 duty, u32 period)
{
struct gb_pwm_chip *pwmc = pwm_chip_to_gb_pwm_chip(chip);
struct gb_pwm_config_request request;
struct gbphy_device *gbphy_dev;
int ret;
request.which = which;
request.duty = cpu_to_le32(duty);
request.period = cpu_to_le32(period);
gbphy_dev = to_gbphy_dev(pwmchip_parent(chip));
ret = gbphy_runtime_get_sync(gbphy_dev);
if (ret)
return ret;
ret = gb_operation_sync(pwmc->connection, GB_PWM_TYPE_CONFIG,
&request, sizeof(request), NULL, 0);
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/module.h`, `linux/slab.h`, `linux/pwm.h`, `linux/greybus.h`, `gbphy.h`.
- Detected declarations: `struct gb_pwm_chip`, `function gb_pwm_get_npwm`, `function gb_pwm_activate_operation`, `function gb_pwm_deactivate_operation`, `function gb_pwm_config_operation`, `function gb_pwm_set_polarity_operation`, `function gb_pwm_enable_operation`, `function gb_pwm_disable_operation`, `function gb_pwm_request`, `function gb_pwm_free`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.