drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio_private.h
Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio_private.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/atomisp/pci/css_2401_system/host/isys_stream2mmio_private.h- Extension
.h- Size
- 5099 bytes
- Lines
- 159
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
isys_stream2mmio_public.hdevice_access.hassert_support.hprint_support.h
Detected Declarations
function Copyrightfunction stream2mmio_get_sid_statefunction stream2mmio_print_sid_statefunction stream2mmio_dump_statefunction interfacefunction stream2mmio_reg_store
Annotated Snippet
#ifndef __ISYS_STREAM2MMIO_PRIVATE_H_INCLUDED__
#define __ISYS_STREAM2MMIO_PRIVATE_H_INCLUDED__
#include "isys_stream2mmio_public.h"
#include "device_access.h" /* ia_css_device_load_uint32 */
#include "assert_support.h" /* assert */
#include "print_support.h" /* print */
#define STREAM2MMIO_COMMAND_REG_ID 0
#define STREAM2MMIO_ACKNOWLEDGE_REG_ID 1
#define STREAM2MMIO_PIX_WIDTH_ID_REG_ID 2
#define STREAM2MMIO_START_ADDR_REG_ID 3 /* master port address,NOT Byte */
#define STREAM2MMIO_END_ADDR_REG_ID 4 /* master port address,NOT Byte */
#define STREAM2MMIO_STRIDE_REG_ID 5 /* stride in master port words, increment is per packet for long sids, stride is not used for short sid's*/
#define STREAM2MMIO_NUM_ITEMS_REG_ID 6 /* number of packets for store packets cmd, number of words for store_words cmd */
#define STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID 7 /* if this register is 1, input will be stalled if there is no pending command for this sid */
#define STREAM2MMIO_REGS_PER_SID 8
/*****************************************************
*
* Native command interface (NCI).
*
*****************************************************/
/**
* @brief Get the stream2mmio-controller state.
* Refer to "stream2mmio_public.h" for details.
*/
STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_state(
const stream2mmio_ID_t ID,
stream2mmio_state_t *state)
{
stream2mmio_sid_ID_t i;
/*
* Get the values of the register-set per
* stream2mmio-controller sids.
*/
for (i = STREAM2MMIO_SID0_ID; i < N_STREAM2MMIO_SID_PROCS[ID]; i++)
stream2mmio_get_sid_state(ID, i, &state->sid_state[i]);
}
/**
* @brief Get the state of the stream2mmio-controller sidess.
* Refer to "stream2mmio_public.h" for details.
*/
STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_sid_state(
const stream2mmio_ID_t ID,
const stream2mmio_sid_ID_t sid_id,
stream2mmio_sid_state_t *state)
{
state->rcv_ack =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_ACKNOWLEDGE_REG_ID);
state->pix_width_id =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_PIX_WIDTH_ID_REG_ID);
state->start_addr =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_START_ADDR_REG_ID);
state->end_addr =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_END_ADDR_REG_ID);
state->strides =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_STRIDE_REG_ID);
state->num_items =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_NUM_ITEMS_REG_ID);
state->block_when_no_cmd =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID);
}
/**
* @brief Dump the state of the stream2mmio-controller sidess.
* Refer to "stream2mmio_public.h" for details.
*/
STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_print_sid_state(
stream2mmio_sid_state_t *state)
{
ia_css_print("\t \t Receive acks 0x%x\n", state->rcv_ack);
ia_css_print("\t \t Pixel width 0x%x\n", state->pix_width_id);
ia_css_print("\t \t Startaddr 0x%x\n", state->start_addr);
ia_css_print("\t \t Endaddr 0x%x\n", state->end_addr);
ia_css_print("\t \t Strides 0x%x\n", state->strides);
ia_css_print("\t \t Num Items 0x%x\n", state->num_items);
ia_css_print("\t \t block when no cmd 0x%x\n", state->block_when_no_cmd);
}
/**
* @brief Dump the ibuf-controller state.
Annotation
- Immediate include surface: `isys_stream2mmio_public.h`, `device_access.h`, `assert_support.h`, `print_support.h`.
- Detected declarations: `function Copyright`, `function stream2mmio_get_sid_state`, `function stream2mmio_print_sid_state`, `function stream2mmio_dump_state`, `function interface`, `function stream2mmio_reg_store`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.