drivers/staging/media/atomisp/pci/css_2401_system/host/pixelgen_private.h

Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/css_2401_system/host/pixelgen_private.h

File Facts

System
Linux kernel
Corpus path
drivers/staging/media/atomisp/pci/css_2401_system/host/pixelgen_private.h
Extension
.h
Size
6594 bytes
Lines
176
Domain
Driver Families
Bucket
drivers/staging
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __PIXELGEN_PRIVATE_H_INCLUDED__
#define __PIXELGEN_PRIVATE_H_INCLUDED__
#include "pixelgen_public.h"
#include "PixelGen_SysBlock_defs.h"
#include "device_access.h"	/* ia_css_device_load_uint32 */
#include "assert_support.h" /* assert */

/*****************************************************
 *
 * Device level interface (DLI).
 *
 *****************************************************/
/**
 * @brief Load the register value.
 * Refer to "pixelgen_public.h" for details.
 */
STORAGE_CLASS_PIXELGEN_C hrt_data pixelgen_ctrl_reg_load(
    const pixelgen_ID_t ID,
    const hrt_address reg)
{
	assert(ID < N_PIXELGEN_ID);
	assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address) - 1);
	return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(
					     hrt_data));
}

/**
 * @brief Store a value to the register.
 * Refer to "pixelgen_ctrl_public.h" for details.
 */
STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_reg_store(
    const pixelgen_ID_t ID,
    const hrt_address reg,
    const hrt_data value)
{
	assert(ID < N_PIXELGEN_ID);
	assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1);

	ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data),
				   value);
}

/* end of DLI */

/*****************************************************
 *
 * Native command interface (NCI).
 *
 *****************************************************/
/**
 * @brief Get the pixelgen state.
 * Refer to "pixelgen_public.h" for details.
 */
STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_get_state(
    const pixelgen_ID_t ID,
    pixelgen_ctrl_state_t *state)
{
	state->com_enable =
	    pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_IDX);
	state->prbs_rstval0 =
	    pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG0_IDX);
	state->prbs_rstval1 =
	    pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG1_IDX);
	state->syng_sid =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_SID_REG_IDX);
	state->syng_free_run =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_FREE_RUN_REG_IDX);
	state->syng_pause =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_PAUSE_REG_IDX);
	state->syng_nof_frames =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_FRAME_REG_IDX);
	state->syng_nof_pixels =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_PIXEL_REG_IDX);
	state->syng_nof_line =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_LINE_REG_IDX);
	state->syng_hblank_cyc =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_HBLANK_CYC_REG_IDX);
	state->syng_vblank_cyc =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_VBLANK_CYC_REG_IDX);
	state->syng_stat_hcnt =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_HCNT_REG_IDX);
	state->syng_stat_vcnt =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_VCNT_REG_IDX);
	state->syng_stat_fcnt =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_FCNT_REG_IDX);
	state->syng_stat_done =
	    pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_DONE_REG_IDX);
	state->tpg_mode =
	    pixelgen_ctrl_reg_load(ID, _PXG_TPG_MODE_REG_IDX);
	state->tpg_hcnt_mask =

Annotation

Implementation Notes