drivers/staging/media/atomisp/pci/css_receiver_2400_defs.h
Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/css_receiver_2400_defs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/atomisp/pci/css_receiver_2400_defs.h- Extension
.h- Size
- 15117 bytes
- Lines
- 249
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
css_receiver_2400_common_defs.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _css_receiver_2400_defs_h_
#define _css_receiver_2400_defs_h_
#include "css_receiver_2400_common_defs.h"
#define CSS_RECEIVER_DATA_WIDTH 8
#define CSS_RECEIVER_RX_TRIG 4
#define CSS_RECEIVER_RF_WORD 32
#define CSS_RECEIVER_IMG_PROC_RF_ADDR 10
#define CSS_RECEIVER_CSI_RF_ADDR 4
#define CSS_RECEIVER_DATA_OUT 12
#define CSS_RECEIVER_CHN_NO 2
#define CSS_RECEIVER_DWORD_CNT 11
#define CSS_RECEIVER_FORMAT_TYP 5
#define CSS_RECEIVER_HRESPONSE 2
#define CSS_RECEIVER_STATE_WIDTH 3
#define CSS_RECEIVER_FIFO_DAT 32
#define CSS_RECEIVER_CNT_VAL 2
#define CSS_RECEIVER_PRED10_VAL 10
#define CSS_RECEIVER_PRED12_VAL 12
#define CSS_RECEIVER_CNT_WIDTH 8
#define CSS_RECEIVER_WORD_CNT 16
#define CSS_RECEIVER_PIXEL_LEN 6
#define CSS_RECEIVER_PIXEL_CNT 5
#define CSS_RECEIVER_COMP_8_BIT 8
#define CSS_RECEIVER_COMP_7_BIT 7
#define CSS_RECEIVER_COMP_6_BIT 6
#define CSI_CONFIG_WIDTH 4
/* division of gen_short data, ch_id and fmt_type over streaming data interface */
#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB 0
#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_DATA_WIDTH)
#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB + _HRT_CSS_RECEIVER_2400_GEN_SHORT_FMT_TYPE_WIDTH)
#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_DATA_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_LSB - 1)
#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_FMT_TYPE_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_LSB - 1)
#define _HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_CH_ID_BIT_MSB (_HRT_CSS_RECEIVER_2400_GEN_SHORT_STR_REAL_WIDTH - 1)
#define _HRT_CSS_RECEIVER_2400_REG_ALIGN 4
#define _HRT_CSS_RECEIVER_2400_BYTES_PER_PKT 4
#define hrt_css_receiver_2400_4_lane_port_offset 0x100
#define hrt_css_receiver_2400_1_lane_port_offset 0x200
#define hrt_css_receiver_2400_2_lane_port_offset 0x300
#define hrt_css_receiver_2400_backend_port_offset 0x100
#define _HRT_CSS_RECEIVER_2400_DEVICE_READY_REG_IDX 0
#define _HRT_CSS_RECEIVER_2400_IRQ_STATUS_REG_IDX 1
#define _HRT_CSS_RECEIVER_2400_IRQ_ENABLE_REG_IDX 2
#define _HRT_CSS_RECEIVER_2400_CSI2_FUNC_PROG_REG_IDX 3
#define _HRT_CSS_RECEIVER_2400_INIT_COUNT_REG_IDX 4
#define _HRT_CSS_RECEIVER_2400_FS_TO_LS_DELAY_REG_IDX 7
#define _HRT_CSS_RECEIVER_2400_LS_TO_DATA_DELAY_REG_IDX 8
#define _HRT_CSS_RECEIVER_2400_DATA_TO_LE_DELAY_REG_IDX 9
#define _HRT_CSS_RECEIVER_2400_LE_TO_FE_DELAY_REG_IDX 10
#define _HRT_CSS_RECEIVER_2400_FE_TO_FS_DELAY_REG_IDX 11
#define _HRT_CSS_RECEIVER_2400_LE_TO_LS_DELAY_REG_IDX 12
#define _HRT_CSS_RECEIVER_2400_TWO_PIXEL_EN_REG_IDX 13
#define _HRT_CSS_RECEIVER_2400_RAW16_18_DATAID_REG_IDX 14
#define _HRT_CSS_RECEIVER_2400_SYNC_COUNT_REG_IDX 15
#define _HRT_CSS_RECEIVER_2400_RX_COUNT_REG_IDX 16
#define _HRT_CSS_RECEIVER_2400_BACKEND_RST_REG_IDX 17
#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG0_IDX 18
#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC0_REG1_IDX 19
#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG0_IDX 20
#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC1_REG1_IDX 21
#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG0_IDX 22
#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC2_REG1_IDX 23
#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG0_IDX 24
#define _HRT_CSS_RECEIVER_2400_COMP_SCHEME_VC3_REG1_IDX 25
#define _HRT_CSS_RECEIVER_2400_RAW18_REG_IDX 26
#define _HRT_CSS_RECEIVER_2400_FORCE_RAW8_REG_IDX 27
#define _HRT_CSS_RECEIVER_2400_RAW16_REG_IDX 28
/* Interrupt bits for IRQ_STATUS and IRQ_ENABLE registers */
#define _HRT_CSS_RECEIVER_2400_IRQ_OVERRUN_BIT 0
#define _HRT_CSS_RECEIVER_2400_IRQ_RESERVED_BIT 1
#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_ENTRY_BIT 2
#define _HRT_CSS_RECEIVER_2400_IRQ_SLEEP_MODE_EXIT_BIT 3
#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_HS_BIT 4
#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_SOT_SYNC_HS_BIT 5
#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CONTROL_BIT 6
#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_DOUBLE_BIT 7
#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_CORRECTED_BIT 8
#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ECC_NO_CORRECTION_BIT 9
#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_CRC_BIT 10
#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_ID_BIT 11
#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_SYNC_BIT 12
#define _HRT_CSS_RECEIVER_2400_IRQ_ERR_FRAME_DATA_BIT 13
#define _HRT_CSS_RECEIVER_2400_IRQ_DATA_TIMEOUT_BIT 14
Annotation
- Immediate include surface: `css_receiver_2400_common_defs.h`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.