drivers/staging/media/atomisp/pci/dma_v2_defs.h

Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/dma_v2_defs.h

File Facts

System
Linux kernel
Corpus path
drivers/staging/media/atomisp/pci/dma_v2_defs.h
Extension
.h
Size
9598 bytes
Lines
192
Domain
Driver Families
Bucket
drivers/staging
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _dma_v2_defs_h
#define _dma_v2_defs_h

#define _DMA_V2_NUM_CHANNELS_ID               MaxNumChannels
#define _DMA_V2_CONNECTIONS_ID                Connections
#define _DMA_V2_DEV_ELEM_WIDTHS_ID            DevElemWidths
#define _DMA_V2_DEV_FIFO_DEPTH_ID             DevFifoDepth
#define _DMA_V2_DEV_FIFO_RD_LAT_ID            DevFifoRdLat
#define _DMA_V2_DEV_FIFO_LAT_BYPASS_ID        DevFifoRdLatBypass
#define _DMA_V2_DEV_NO_BURST_ID               DevNoBurst
#define _DMA_V2_DEV_RD_ACCEPT_ID              DevRdAccept
#define _DMA_V2_DEV_SRMD_ID                   DevSRMD
#define _DMA_V2_DEV_HAS_CRUN_ID               CRunMasters
#define _DMA_V2_CTRL_ACK_FIFO_DEPTH_ID        CtrlAckFifoDepth
#define _DMA_V2_CMD_FIFO_DEPTH_ID             CommandFifoDepth
#define _DMA_V2_CMD_FIFO_RD_LAT_ID            CommandFifoRdLat
#define _DMA_V2_CMD_FIFO_LAT_BYPASS_ID        CommandFifoRdLatBypass
#define _DMA_V2_NO_PACK_ID                    has_no_pack

#define _DMA_V2_REG_ALIGN                4
#define _DMA_V2_REG_ADDR_BITS            2

/* Command word */
#define _DMA_V2_CMD_IDX            0
#define _DMA_V2_CMD_BITS           6
#define _DMA_V2_CHANNEL_IDX        (_DMA_V2_CMD_IDX + _DMA_V2_CMD_BITS)
#define _DMA_V2_CHANNEL_BITS       5

/* The command to set a parameter contains the PARAM field next */
#define _DMA_V2_PARAM_IDX          (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS)
#define _DMA_V2_PARAM_BITS         4

/* Commands to read, write or init specific blocks contain these
   three values */
#define _DMA_V2_SPEC_DEV_A_XB_IDX  (_DMA_V2_CHANNEL_IDX + _DMA_V2_CHANNEL_BITS)
#define _DMA_V2_SPEC_DEV_A_XB_BITS 8
#define _DMA_V2_SPEC_DEV_B_XB_IDX  (_DMA_V2_SPEC_DEV_A_XB_IDX + _DMA_V2_SPEC_DEV_A_XB_BITS)
#define _DMA_V2_SPEC_DEV_B_XB_BITS 8
#define _DMA_V2_SPEC_YB_IDX        (_DMA_V2_SPEC_DEV_B_XB_IDX + _DMA_V2_SPEC_DEV_B_XB_BITS)
#define _DMA_V2_SPEC_YB_BITS       (32 - _DMA_V2_SPEC_DEV_B_XB_BITS - _DMA_V2_SPEC_DEV_A_XB_BITS - _DMA_V2_CMD_BITS - _DMA_V2_CHANNEL_BITS)

/* */
#define _DMA_V2_CMD_CTRL_IDX       4
#define _DMA_V2_CMD_CTRL_BITS      4

/* Packing setup word */
#define _DMA_V2_CONNECTION_IDX     0
#define _DMA_V2_CONNECTION_BITS    4
#define _DMA_V2_EXTENSION_IDX      (_DMA_V2_CONNECTION_IDX + _DMA_V2_CONNECTION_BITS)
#define _DMA_V2_EXTENSION_BITS     1

/* Elements packing word */
#define _DMA_V2_ELEMENTS_IDX        0
#define _DMA_V2_ELEMENTS_BITS       8
#define _DMA_V2_LEFT_CROPPING_IDX  (_DMA_V2_ELEMENTS_IDX + _DMA_V2_ELEMENTS_BITS)
#define _DMA_V2_LEFT_CROPPING_BITS  8

#define _DMA_V2_WIDTH_IDX           0
#define _DMA_V2_WIDTH_BITS         16

#define _DMA_V2_HEIGHT_IDX          0
#define _DMA_V2_HEIGHT_BITS        16

#define _DMA_V2_STRIDE_IDX          0
#define _DMA_V2_STRIDE_BITS        32

/* Command IDs */
#define _DMA_V2_MOVE_B2A_COMMAND                             0
#define _DMA_V2_MOVE_B2A_BLOCK_COMMAND                       1
#define _DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND                 2
#define _DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND           3
#define _DMA_V2_MOVE_A2B_COMMAND                             4
#define _DMA_V2_MOVE_A2B_BLOCK_COMMAND                       5
#define _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND                 6
#define _DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND           7
#define _DMA_V2_INIT_A_COMMAND                               8
#define _DMA_V2_INIT_A_BLOCK_COMMAND                         9
#define _DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND                  10
#define _DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND            11
#define _DMA_V2_INIT_B_COMMAND                              12
#define _DMA_V2_INIT_B_BLOCK_COMMAND                        13
#define _DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND                  14
#define _DMA_V2_INIT_B_BLOCK_NO_SYNC_CHK_COMMAND            15
#define _DMA_V2_NO_ACK_MOVE_B2A_NO_SYNC_CHK_COMMAND         (_DMA_V2_MOVE_B2A_NO_SYNC_CHK_COMMAND       + 16)
#define _DMA_V2_NO_ACK_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND   (_DMA_V2_MOVE_B2A_BLOCK_NO_SYNC_CHK_COMMAND + 16)
#define _DMA_V2_NO_ACK_MOVE_A2B_NO_SYNC_CHK_COMMAND         (_DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND       + 16)
#define _DMA_V2_NO_ACK_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND   (_DMA_V2_MOVE_A2B_BLOCK_NO_SYNC_CHK_COMMAND + 16)
#define _DMA_V2_NO_ACK_INIT_A_NO_SYNC_CHK_COMMAND           (_DMA_V2_INIT_A_NO_SYNC_CHK_COMMAND         + 16)
#define _DMA_V2_NO_ACK_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND     (_DMA_V2_INIT_A_BLOCK_NO_SYNC_CHK_COMMAND   + 16)
#define _DMA_V2_NO_ACK_INIT_B_NO_SYNC_CHK_COMMAND           (_DMA_V2_INIT_B_NO_SYNC_CHK_COMMAND         + 16)

Annotation

Implementation Notes