drivers/staging/media/atomisp/pci/hive_isp_css_common/host/irq.c

Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/irq.c

File Facts

System
Linux kernel
Corpus path
drivers/staging/media/atomisp/pci/hive_isp_css_common/host/irq.c
Extension
.c
Size
9636 bytes
Lines
414
Domain
Driver Families
Bucket
drivers/staging
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (IRQ_NESTING_ID[ID] != N_virq_id) {
			/* Single level nesting, otherwise we'd need to recurse */
			irq_enable_channel(IRQ0_ID, IRQ_NESTING_ID[ID]);
		}
	} else {
		irq_disable_channel(ID, channel_ID);
		if ((IRQ_NESTING_ID[ID] != N_virq_id) && !any_irq_channel_enabled(ID)) {
			/* Only disable the top if the nested ones are empty */
			irq_disable_channel(IRQ0_ID, IRQ_NESTING_ID[ID]);
		}
	}
	return;
}

void virq_clear_all(void)
{
	irq_ID_t	irq_id;

	for (irq_id = (irq_ID_t)0; irq_id < N_IRQ_ID; irq_id++)
		irq_clear_all(irq_id);

	return;
}

enum hrt_isp_css_irq_status
virq_get_channel_signals(struct virq_info *irq_info)
{
	enum hrt_isp_css_irq_status irq_status = hrt_isp_css_irq_status_error;
	irq_ID_t ID;

	assert(irq_info);

	for (ID = (irq_ID_t)0 ; ID < N_IRQ_ID; ID++) {
		if (any_irq_channel_enabled(ID)) {
			hrt_data	irq_data = irq_reg_load(ID,
							    _HRT_IRQ_CONTROLLER_STATUS_REG_IDX);

			if (irq_data != 0) {
				/* The error condition is an IRQ pulse received with no IRQ status written */
				irq_status = hrt_isp_css_irq_status_success;
			}

			irq_info->irq_status_reg[ID] |= irq_data;

			irq_reg_store(ID,
				      _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX, irq_data);

			irq_wait_for_write_complete(ID);
		}
	}

	return irq_status;
}

void virq_clear_info(struct virq_info *irq_info)
{
	irq_ID_t ID;

	assert(irq_info);

	for (ID = (irq_ID_t)0 ; ID < N_IRQ_ID; ID++)
		irq_info->irq_status_reg[ID] = 0;

	return;
}

enum hrt_isp_css_irq_status virq_get_channel_id(
    enum virq_id					*irq_id)
{
	unsigned int irq_status = irq_reg_load(IRQ0_ID,
					       _HRT_IRQ_CONTROLLER_STATUS_REG_IDX);
	unsigned int idx;
	enum hrt_isp_css_irq_status status = hrt_isp_css_irq_status_success;
	irq_ID_t ID;

	assert(irq_id);

	/* find the first irq bit on device 0 */
	for (idx = 0; idx < IRQ_N_CHANNEL[IRQ0_ID]; idx++) {
		if (irq_status & (1U << idx))
			break;
	}

	if (idx == IRQ_N_CHANNEL[IRQ0_ID])
		return hrt_isp_css_irq_status_error;

	/* Check whether there are more bits set on device 0 */
	if (irq_status != (1U << idx))
		status = hrt_isp_css_irq_status_more_irqs;

Annotation

Implementation Notes