drivers/staging/media/atomisp/pci/hive_isp_css_common/host/sp_private.h
Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/sp_private.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/atomisp/pci/hive_isp_css_common/host/sp_private.h- Extension
.h- Size
- 3616 bytes
- Lines
- 159
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
sp_public.hdevice_access.hassert_support.h
Detected Declarations
function Copyrightfunction sp_ctrl_loadfunction sp_ctrl_getbitfunction sp_ctrl_setbitfunction sp_ctrl_clearbitfunction sp_dmem_storefunction sp_dmem_loadfunction sp_dmem_store_uint8function sp_dmem_store_uint16function sp_dmem_store_uint32function sp_dmem_load_uint8function sp_dmem_load_uint16function sp_dmem_load_uint32
Annotated Snippet
#ifndef __SP_PRIVATE_H_INCLUDED__
#define __SP_PRIVATE_H_INCLUDED__
#include "sp_public.h"
#include "device_access.h"
#include "assert_support.h"
STORAGE_CLASS_SP_C void sp_ctrl_store(
const sp_ID_t ID,
const hrt_address reg,
const hrt_data value)
{
assert(ID < N_SP_ID);
assert(SP_CTRL_BASE[ID] != (hrt_address)-1);
ia_css_device_store_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data), value);
return;
}
STORAGE_CLASS_SP_C hrt_data sp_ctrl_load(
const sp_ID_t ID,
const hrt_address reg)
{
assert(ID < N_SP_ID);
assert(SP_CTRL_BASE[ID] != (hrt_address)-1);
return ia_css_device_load_uint32(SP_CTRL_BASE[ID] + reg * sizeof(hrt_data));
}
STORAGE_CLASS_SP_C bool sp_ctrl_getbit(
const sp_ID_t ID,
const hrt_address reg,
const unsigned int bit)
{
hrt_data val = sp_ctrl_load(ID, reg);
return (val & (1UL << bit)) != 0;
}
STORAGE_CLASS_SP_C void sp_ctrl_setbit(
const sp_ID_t ID,
const hrt_address reg,
const unsigned int bit)
{
hrt_data data = sp_ctrl_load(ID, reg);
sp_ctrl_store(ID, reg, (data | (1UL << bit)));
return;
}
STORAGE_CLASS_SP_C void sp_ctrl_clearbit(
const sp_ID_t ID,
const hrt_address reg,
const unsigned int bit)
{
hrt_data data = sp_ctrl_load(ID, reg);
sp_ctrl_store(ID, reg, (data & ~(1UL << bit)));
return;
}
STORAGE_CLASS_SP_C void sp_dmem_store(
const sp_ID_t ID,
hrt_address addr,
const void *data,
const size_t size)
{
assert(ID < N_SP_ID);
assert(SP_DMEM_BASE[ID] != (hrt_address)-1);
ia_css_device_store(SP_DMEM_BASE[ID] + addr, data, size);
return;
}
STORAGE_CLASS_SP_C void sp_dmem_load(
const sp_ID_t ID,
const hrt_address addr,
void *data,
const size_t size)
{
assert(ID < N_SP_ID);
assert(SP_DMEM_BASE[ID] != (hrt_address)-1);
ia_css_device_load(SP_DMEM_BASE[ID] + addr, data, size);
return;
}
STORAGE_CLASS_SP_C void sp_dmem_store_uint8(
const sp_ID_t ID,
hrt_address addr,
const uint8_t data)
{
Annotation
- Immediate include surface: `sp_public.h`, `device_access.h`, `assert_support.h`.
- Detected declarations: `function Copyright`, `function sp_ctrl_load`, `function sp_ctrl_getbit`, `function sp_ctrl_setbit`, `function sp_ctrl_clearbit`, `function sp_dmem_store`, `function sp_dmem_load`, `function sp_dmem_store_uint8`, `function sp_dmem_store_uint16`, `function sp_dmem_store_uint32`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.