drivers/staging/media/atomisp/pci/hive_isp_css_common/host/timed_ctrl.c
Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/timed_ctrl.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/atomisp/pci/hive_isp_css_common/host/timed_ctrl.c- Extension
.c- Size
- 1849 bytes
- Lines
- 67
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
timed_ctrl.htimed_ctrl_private.hassert_support.h
Detected Declarations
function Copyrightfunction timed_ctrl_snd_sp_commndfunction timed_ctrl_snd_gpio_commnd
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Support for Intel Camera Imaging ISP subsystem.
* Copyright (c) 2015, Intel Corporation.
*/
#include "timed_ctrl.h"
#ifndef __INLINE_TIMED_CTRL__
#include "timed_ctrl_private.h"
#endif /* __INLINE_TIMED_CTRL__ */
#include "assert_support.h"
void timed_ctrl_snd_commnd(
const timed_ctrl_ID_t ID,
hrt_data mask,
hrt_data condition,
hrt_data counter,
hrt_address addr,
hrt_data value)
{
OP___assert(ID == TIMED_CTRL0_ID);
OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address)-1);
timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, mask);
timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, condition);
timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, counter);
timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, (hrt_data)addr);
timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, value);
}
/* pqiao TODO: make sure the following commands get
correct BASE address both for csim and android */
void timed_ctrl_snd_sp_commnd(
const timed_ctrl_ID_t ID,
hrt_data mask,
hrt_data condition,
hrt_data counter,
const sp_ID_t SP_ID,
hrt_address offset,
hrt_data value)
{
OP___assert(SP_ID < N_SP_ID);
OP___assert(SP_DMEM_BASE[SP_ID] != (hrt_address)-1);
timed_ctrl_snd_commnd(ID, mask, condition, counter,
SP_DMEM_BASE[SP_ID] + offset, value);
}
void timed_ctrl_snd_gpio_commnd(
const timed_ctrl_ID_t ID,
hrt_data mask,
hrt_data condition,
hrt_data counter,
const gpio_ID_t GPIO_ID,
hrt_address offset,
hrt_data value)
{
OP___assert(GPIO_ID < N_GPIO_ID);
OP___assert(GPIO_BASE[GPIO_ID] != (hrt_address)-1);
timed_ctrl_snd_commnd(ID, mask, condition, counter,
GPIO_BASE[GPIO_ID] + offset, value);
}
Annotation
- Immediate include surface: `timed_ctrl.h`, `timed_ctrl_private.h`, `assert_support.h`.
- Detected declarations: `function Copyright`, `function timed_ctrl_snd_sp_commnd`, `function timed_ctrl_snd_gpio_commnd`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.