drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isp_public.h

Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isp_public.h

File Facts

System
Linux kernel
Corpus path
drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isp_public.h
Extension
.h
Size
4262 bytes
Lines
165
Domain
Driver Families
Bucket
drivers/staging
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __ISP_PUBLIC_H_INCLUDED__
#define __ISP_PUBLIC_H_INCLUDED__

#include <type_support.h>
#include "system_local.h"

/*! Enable or disable the program complete irq signal of ISP[ID]

 \param	ID[in]				SP identifier
 \param	cnd[in]				predicate

 \return none, if(cnd) enable(ISP[ID].irq) else disable(ISP[ID].irq)
 */
void cnd_isp_irq_enable(
    const isp_ID_t		ID,
    const bool			cnd);

/*! Write to the status and control register of ISP[ID]

 \param	ID[in]				ISP identifier
 \param	reg[in]				register index
 \param value[in]			The data to be written

 \return none, ISP[ID].sc[reg] = value
 */
STORAGE_CLASS_ISP_H void isp_ctrl_store(
    const isp_ID_t		ID,
    const unsigned int	reg,
    const hrt_data		value);

/*! Read from the status and control register of ISP[ID]

 \param	ID[in]				ISP identifier
 \param	reg[in]				register index
 \param value[in]			The data to be written

 \return ISP[ID].sc[reg]
 */
STORAGE_CLASS_ISP_H hrt_data isp_ctrl_load(
    const isp_ID_t		ID,
    const unsigned int	reg);

/*! Get the status of a bitfield in the control register of ISP[ID]

 \param	ID[in]				ISP identifier
 \param	reg[in]				register index
 \param bit[in]				The bit index to be checked

 \return  (ISP[ID].sc[reg] & (1<<bit)) != 0
 */
STORAGE_CLASS_ISP_H bool isp_ctrl_getbit(
    const isp_ID_t		ID,
    const unsigned int	reg,
    const unsigned int	bit);

/*! Set a bitfield in the control register of ISP[ID]

 \param	ID[in]				ISP identifier
 \param	reg[in]				register index
 \param bit[in]				The bit index to be set

 \return none, ISP[ID].sc[reg] |= (1<<bit)
 */
STORAGE_CLASS_ISP_H void isp_ctrl_setbit(
    const isp_ID_t		ID,
    const unsigned int	reg,
    const unsigned int	bit);

/*! Clear a bitfield in the control register of ISP[ID]

 \param	ID[in]				ISP identifier
 \param	reg[in]				register index
 \param bit[in]				The bit index to be set

 \return none, ISP[ID].sc[reg] &= ~(1<<bit)
 */
STORAGE_CLASS_ISP_H void isp_ctrl_clearbit(
    const isp_ID_t		ID,
    const unsigned int	reg,
    const unsigned int	bit);

/*! Write to the DMEM of ISP[ID]

 \param	ID[in]				ISP identifier
 \param	addr[in]			the address in DMEM
 \param data[in]			The data to be written
 \param size[in]			The size(in bytes) of the data to be written

 \return none, ISP[ID].dmem[addr...addr+size-1] = data
 */

Annotation

Implementation Notes