drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h- Extension
.h- Size
- 1981 bytes
- Lines
- 76
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
system_local.hdevice_access.hassert_support.h
Detected Declarations
function mmu_reg_storefunction mmu_reg_load
Annotated Snippet
#ifndef __MMU_PUBLIC_H_INCLUDED__
#define __MMU_PUBLIC_H_INCLUDED__
#include "system_local.h"
#include "device_access.h"
#include "assert_support.h"
/**
* mmu_set_page_table_base_index() - Set the page table base index of MMU[ID]
* @ID: MMU identifier
* @base_index: page table base index
*
* Return: none, MMU[ID].page_table_base_index = base_index
*/
void mmu_set_page_table_base_index(const mmu_ID_t ID, const hrt_data base_index);
/**
* mmu_get_page_table_base_index() - Get the page table base index of MMU[ID]
* @ID: MMU identifier
*
* Return: MMU[ID].page_table_base_index
*/
hrt_data mmu_get_page_table_base_index(const mmu_ID_t ID);
/**
* mmu_invalidate_cache() - nvalidate the page table cache of MMU[ID]
* @ID: MMU identifier
*
* Return: none
*/
void mmu_invalidate_cache(const mmu_ID_t ID);
/**
* mmu_invalidate_cache_all() - Invalidate the page table cache of all MMUs
*
* Return: none
*/
void mmu_invalidate_cache_all(void);
/**
* mmu_reg_store() - Write to a control register of MMU[ID]
* @ID: MMU identifier
* @reg: register index
* @value: The data to be written
*
* Return: none, MMU[ID].ctrl[reg] = value
*/
static inline void mmu_reg_store(const mmu_ID_t ID, const unsigned int reg, const hrt_data value)
{
assert(ID < N_MMU_ID);
assert(MMU_BASE[ID] != (hrt_address) - 1);
ia_css_device_store_uint32(MMU_BASE[ID] + reg * sizeof(hrt_data), value);
}
/**
* mmu_reg_load() - Read from a control register of MMU[ID]
* @ID: MMU identifier
* @reg: register index
*
* Return: MMU[ID].ctrl[reg]
*/
static inline hrt_data mmu_reg_load(const mmu_ID_t ID, const unsigned int reg)
{
assert(ID < N_MMU_ID);
assert(MMU_BASE[ID] != (hrt_address) - 1);
return ia_css_device_load_uint32(MMU_BASE[ID] + reg * sizeof(hrt_data));
}
#endif /* __MMU_PUBLIC_H_INCLUDED__ */
Annotation
- Immediate include surface: `system_local.h`, `device_access.h`, `assert_support.h`.
- Detected declarations: `function mmu_reg_store`, `function mmu_reg_load`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.