drivers/staging/media/atomisp/pci/ia_css_isp_params.c

Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/ia_css_isp_params.c

File Facts

System
Linux kernel
Corpus path
drivers/staging/media/atomisp/pci/ia_css_isp_params.c
Extension
.c
Size
98138 bytes
Lines
3336
Domain
Driver Families
Bucket
drivers/staging
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (size) {
			ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
					    "ia_css_process_anr() enter:\n");

			ia_css_anr_encode((struct sh_css_isp_anr_params *)
					  &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset],
					  &params->anr_config,
					  size);
			params->isp_params_changed = true;
			params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] =
			    true;

			ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
					    "ia_css_process_anr() leave:\n");
		}
	}
}

/* Code generated by genparam/gencode.c:gen_process_function() */

static void
ia_css_process_anr2(
    unsigned int pipe_id,
    const struct ia_css_pipeline_stage *stage,
    struct ia_css_isp_parameters *params)
{
	assert(params);

	{
		unsigned int size   =
		    stage->binary->info->mem_offsets.offsets.param->vmem.anr2.size;

		unsigned int offset =
		    stage->binary->info->mem_offsets.offsets.param->vmem.anr2.offset;

		if (size) {
			ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
					    "ia_css_process_anr2() enter:\n");

			ia_css_anr2_vmem_encode((struct ia_css_isp_anr2_params *)
						&stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_VMEM].address[offset],
						&params->anr_thres,
						size);
			params->isp_params_changed = true;
			params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_VMEM] =
			    true;

			ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
					    "ia_css_process_anr2() leave:\n");
		}
	}
}

/* Code generated by genparam/gencode.c:gen_process_function() */

static void
ia_css_process_bh(
    unsigned int pipe_id,
    const struct ia_css_pipeline_stage *stage,
    struct ia_css_isp_parameters *params)
{
	assert(params);

	{
		unsigned int size   =
		    stage->binary->info->mem_offsets.offsets.param->dmem.bh.size;

		unsigned int offset =
		    stage->binary->info->mem_offsets.offsets.param->dmem.bh.offset;

		if (size) {
			ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n");

			ia_css_bh_encode((struct sh_css_isp_bh_params *)
					 &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset],
					 &params->s3a_config,
					 size);
			params->isp_params_changed = true;
			params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] =
			    true;

			ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() leave:\n");
		}
	}
	{
		unsigned int size   =
		    stage->binary->info->mem_offsets.offsets.param->hmem0.bh.size;

		if (size) {
			ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_process_bh() enter:\n");

Annotation

Implementation Notes