drivers/staging/media/atomisp/pci/input_formatter_subsystem_defs.h

File Facts

System

Linux kernel

Corpus path

drivers/staging/media/atomisp/pci/input_formatter_subsystem_defs.h

Extension

.h

Size

2080 bytes

Lines

46

Domain

Driver Families

Bucket

drivers/staging

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _if_subsystem_defs_h__
#define _if_subsystem_defs_h__

#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0            0
#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_1            1
#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_2            2
#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_3            3
#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_4            4
#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_5            5
#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_6            6
#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_7            7
#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_FSYNC_LUT_REG        8
#define HIVE_IFMT_GP_REGS_SRST_IDX                          9
#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IDX                 10

#define HIVE_IFMT_GP_REGS_CH_ID_FMT_TYPE_IDX               11

#define HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_BASE         HIVE_IFMT_GP_REGS_INPUT_SWITCH_LUT_REG_0

/* order of the input bits for the ifmt irq controller */
#define HIVE_IFMT_IRQ_IFT_PRIM_BIT_ID                       0
#define HIVE_IFMT_IRQ_IFT_PRIM_B_BIT_ID                     1
#define HIVE_IFMT_IRQ_IFT_SEC_BIT_ID                        2
#define HIVE_IFMT_IRQ_MEM_CPY_BIT_ID                        3
#define HIVE_IFMT_IRQ_SIDEBAND_CHANGED_BIT_ID               4

/* order of the input bits for the ifmt Soft reset register */
#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_BIT_IDX             0
#define HIVE_IFMT_GP_REGS_SRST_IFT_PRIM_B_BIT_IDX           1
#define HIVE_IFMT_GP_REGS_SRST_IFT_SEC_BIT_IDX              2
#define HIVE_IFMT_GP_REGS_SRST_MEM_CPY_BIT_IDX              3

/* order of the input bits for the ifmt Soft reset register */
#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_BIT_IDX     0
#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_PRIM_B_BIT_IDX   1
#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_IFT_SEC_BIT_IDX      2
#define HIVE_IFMT_GP_REGS_SLV_REG_SRST_MEM_CPY_BIT_IDX      3

#endif /* _if_subsystem_defs_h__ */

Annotation

• Atlas domain: Driver Families / drivers/staging.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.