drivers/staging/media/atomisp/pci/irq_controller_defs.h

File Facts

System

Linux kernel

Corpus path

drivers/staging/media/atomisp/pci/irq_controller_defs.h

Extension

.h

Size

652 bytes

Lines

21

Domain

Driver Families

Bucket

drivers/staging

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _irq_controller_defs_h
#define _irq_controller_defs_h

#define _HRT_IRQ_CONTROLLER_EDGE_REG_IDX           0
#define _HRT_IRQ_CONTROLLER_MASK_REG_IDX           1
#define _HRT_IRQ_CONTROLLER_STATUS_REG_IDX         2
#define _HRT_IRQ_CONTROLLER_CLEAR_REG_IDX          3
#define _HRT_IRQ_CONTROLLER_ENABLE_REG_IDX         4
#define _HRT_IRQ_CONTROLLER_EDGE_NOT_PULSE_REG_IDX 5
#define _HRT_IRQ_CONTROLLER_STR_OUT_ENABLE_REG_IDX 6

#define _HRT_IRQ_CONTROLLER_REG_ALIGN 4

#endif /* _irq_controller_defs_h */

Annotation

• Atlas domain: Driver Families / drivers/staging.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.