drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h

File Facts

System

Linux kernel

Corpus path

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_1.0/ia_css_xnr_param.h

Extension

.h

Size

925 bytes

Lines

36

Domain

Driver Families

Bucket

drivers/staging

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• type_support.h
• system_global.h

Detected Declarations

• struct sh_css_isp_xnr_vamem_params
• struct sh_css_isp_xnr_params

Annotated Snippet

struct sh_css_isp_xnr_vamem_params {
	u16 xnr[SH_CSS_ISP_XNR_TABLE_SIZE];
};

struct sh_css_isp_xnr_params {
	/* XNR threshold.
	 * type:u0.16 but actual valid range is:[0,255]
	 * valid range is dependent on SH_CSS_ISP_YUV_BITS (currently 8bits)
	 * default: 25 */
	u16 threshold;
};

#endif /* __IA_CSS_XNR_PARAM_H */

Annotation

• Immediate include surface: `type_support.h`, `system_global.h`.
• Detected declarations: `struct sh_css_isp_xnr_vamem_params`, `struct sh_css_isp_xnr_params`.
• Atlas domain: Driver Families / drivers/staging.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.