drivers/staging/media/atomisp/pci/mmu/sh_mmu_mrfld.c
Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/mmu/sh_mmu_mrfld.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/atomisp/pci/mmu/sh_mmu_mrfld.c- Extension
.c- Size
- 1548 bytes
- Lines
- 67
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
type_support.hmmu/isp_mmu.hmmu/sh_mmu_mrfld.hatomisp_compat.h
Detected Declarations
function Copyrightfunction sh_pte_to_physfunction sh_get_pd_basefunction sh_tlb_flush
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Support for Merrifield PNW Camera Imaging ISP subsystem.
*
* Copyright (c) 2012 Intel Corporation. All Rights Reserved.
*
* Copyright (c) 2012 Silicon Hive www.siliconhive.com.
*/
#include "type_support.h"
#include "mmu/isp_mmu.h"
#include "mmu/sh_mmu_mrfld.h"
#include "atomisp_compat.h"
#define MERR_VALID_PTE_MASK 0x80000000
/*
* include SH header file here
*/
static unsigned int sh_phys_to_pte(struct isp_mmu *mmu,
phys_addr_t phys)
{
return phys >> ISP_PAGE_OFFSET;
}
static phys_addr_t sh_pte_to_phys(struct isp_mmu *mmu,
unsigned int pte)
{
unsigned int mask = mmu->driver->pte_valid_mask;
return (phys_addr_t)((pte & ~mask) << ISP_PAGE_OFFSET);
}
static unsigned int sh_get_pd_base(struct isp_mmu *mmu,
phys_addr_t phys)
{
unsigned int pte = sh_phys_to_pte(mmu, phys);
return HOST_ADDRESS(pte);
}
/*
* callback to flush tlb.
*
* tlb_flush_range will at least flush TLBs containing
* address mapping from addr to addr + size.
*
* tlb_flush_all will flush all TLBs.
*
* tlb_flush_all is must be provided. if tlb_flush_range is
* not valid, it will set to tlb_flush_all by default.
*/
static void sh_tlb_flush(struct isp_mmu *mmu)
{
ia_css_mmu_invalidate_cache();
}
struct isp_mmu_client sh_mmu_mrfld = {
.name = "Silicon Hive ISP3000 MMU",
.pte_valid_mask = MERR_VALID_PTE_MASK,
.null_pte = ~MERR_VALID_PTE_MASK,
.get_pd_base = sh_get_pd_base,
.tlb_flush_all = sh_tlb_flush,
.phys_to_pte = sh_phys_to_pte,
.pte_to_phys = sh_pte_to_phys,
};
Annotation
- Immediate include surface: `type_support.h`, `mmu/isp_mmu.h`, `mmu/sh_mmu_mrfld.h`, `atomisp_compat.h`.
- Detected declarations: `function Copyright`, `function sh_pte_to_phys`, `function sh_get_pd_base`, `function sh_tlb_flush`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.