drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c

Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c

File Facts

System
Linux kernel
Corpus path
drivers/staging/media/atomisp/pci/runtime/isp_param/src/isp_param.c
Extension
.c
Size
5964 bytes
Lines
207
Domain
Driver Families
Bucket
drivers/staging
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (size) {
				mem_params->params[pclass][mem].address = kvcalloc(1,
										   size,
										   GFP_KERNEL);
				if (!mem_params->params[pclass][mem].address) {
					err = -ENOMEM;
					goto cleanup;
				}
				if (pclass != IA_CSS_PARAM_CLASS_PARAM) {
					css_params->params[pclass][mem].address = hmm_alloc(size);
					if (!css_params->params[pclass][mem].address) {
						err = -ENOMEM;
						goto cleanup;
					}
				}
			}
		}
	}
	return err;
cleanup:
	ia_css_isp_param_destroy_isp_parameters(mem_params, css_params);
	return err;
}

void
ia_css_isp_param_destroy_isp_parameters(
    struct ia_css_isp_param_host_segments *mem_params,
    struct ia_css_isp_param_css_segments *css_params)
{
	unsigned int mem, pclass;

	for (mem = 0; mem < IA_CSS_NUM_MEMORIES; mem++) {
		for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) {
			kvfree(mem_params->params[pclass][mem].address);
			if (css_params->params[pclass][mem].address)
				hmm_free(css_params->params[pclass][mem].address);
			mem_params->params[pclass][mem].address = NULL;
			css_params->params[pclass][mem].address = 0x0;
		}
	}
}

void
ia_css_isp_param_load_fw_params(
    const char *fw,
    union ia_css_all_memory_offsets *mem_offsets,
    const struct ia_css_isp_param_memory_offsets *memory_offsets,
    bool init)
{
	unsigned int pclass;

	for (pclass = 0; pclass < IA_CSS_NUM_PARAM_CLASSES; pclass++) {
		mem_offsets->array[pclass].ptr = NULL;
		if (init)
			mem_offsets->array[pclass].ptr = (void *)(fw + memory_offsets->offsets[pclass]);
	}
}

int ia_css_isp_param_copy_isp_mem_if_to_ddr(struct ia_css_isp_param_css_segments *ddr,
					    const struct ia_css_isp_param_host_segments *host,
					    enum ia_css_param_class pclass)
{
	unsigned int mem;

	for (mem = 0; mem < N_IA_CSS_ISP_MEMORIES; mem++) {
		size_t       size	  = host->params[pclass][mem].size;
		ia_css_ptr ddr_mem_ptr  = ddr->params[pclass][mem].address;
		char	    *host_mem_ptr = host->params[pclass][mem].address;

		if (size != ddr->params[pclass][mem].size)
			return -EINVAL;
		if (!size)
			continue;
		hmm_store(ddr_mem_ptr, host_mem_ptr, size);
	}
	return 0;
}

void
ia_css_isp_param_enable_pipeline(
    const struct ia_css_isp_param_host_segments *mem_params)
{
	/* By protocol b0 of the mandatory uint32_t first field of the
	   input parameter is a disable bit*/
	short dmem_offset = 0;

	if (mem_params->params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM0].size == 0)
		return;

	*(uint32_t *)

Annotation

Implementation Notes