drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ia_css_pipeline.h
Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ia_css_pipeline.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ia_css_pipeline.h- Extension
.h- Size
- 7325 bytes
- Lines
- 273
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
sh_css_internal.hia_css_pipe_public.hia_css_pipeline_common.h
Detected Declarations
struct ia_css_pipeline_stagestruct ia_css_pipelinestruct ia_css_pipeline_stage_desc
Annotated Snippet
struct ia_css_pipeline_stage {
unsigned int stage_num;
struct ia_css_binary *binary; /* built-in binary */
struct ia_css_binary_info *binary_info;
const struct ia_css_fw_info *firmware; /* acceleration binary */
/* SP function for SP stage */
enum ia_css_pipeline_stage_sp_func sp_func;
unsigned int max_input_width; /* For SP raw copy */
struct sh_css_binary_args args;
int mode;
bool out_frame_allocated[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
bool vf_frame_allocated;
struct ia_css_pipeline_stage *next;
bool enable_zoom;
};
/* Pipeline of n stages to be executed on SP/ISP per stage */
struct ia_css_pipeline {
enum ia_css_pipe_id pipe_id;
u8 pipe_num;
struct ia_css_pipeline_stage *stages;
struct ia_css_pipeline_stage *current_stage;
unsigned int num_stages;
struct ia_css_frame in_frame;
struct ia_css_frame out_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE];
struct ia_css_frame vf_frame[IA_CSS_PIPE_MAX_OUTPUT_STAGE];
unsigned int dvs_frame_delay;
unsigned int inout_port_config;
int num_execs;
bool acquire_isp_each_stage;
};
#define DEFAULT_PIPELINE { \
.pipe_id = IA_CSS_PIPE_ID_PREVIEW, \
.in_frame = DEFAULT_FRAME, \
.out_frame = {DEFAULT_FRAME}, \
.vf_frame = {DEFAULT_FRAME}, \
.dvs_frame_delay = IA_CSS_FRAME_DELAY_1, \
.num_execs = -1, \
.acquire_isp_each_stage = true, \
}
/* Stage descriptor used to create a new stage in the pipeline */
struct ia_css_pipeline_stage_desc {
struct ia_css_binary *binary;
const struct ia_css_fw_info *firmware;
enum ia_css_pipeline_stage_sp_func sp_func;
unsigned int max_input_width;
unsigned int mode;
struct ia_css_frame *in_frame;
struct ia_css_frame *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
struct ia_css_frame *vf_frame;
};
/* @brief initialize the pipeline module
*
* @return None
*
* Initializes the pipeline module. This API has to be called
* before any operation on the pipeline module is done
*/
void ia_css_pipeline_init(void);
/* @brief initialize the pipeline structure with default values
*
* @param[out] pipeline structure to be initialized with defaults
* @param[in] pipe_id
* @param[in] pipe_num Number that uniquely identifies a pipeline.
* @return 0 or error code upon error.
*
* Initializes the pipeline structure with a set of default values.
* This API is expected to be used when a pipeline structure is allocated
* externally and needs sane defaults
*/
int ia_css_pipeline_create(
struct ia_css_pipeline *pipeline,
enum ia_css_pipe_id pipe_id,
unsigned int pipe_num,
unsigned int dvs_frame_delay);
/* @brief destroy a pipeline
*
* @param[in] pipeline
* @return None
*
*/
void ia_css_pipeline_destroy(struct ia_css_pipeline *pipeline);
/* @brief Starts a pipeline
*
Annotation
- Immediate include surface: `sh_css_internal.h`, `ia_css_pipe_public.h`, `ia_css_pipeline_common.h`.
- Detected declarations: `struct ia_css_pipeline_stage`, `struct ia_css_pipeline`, `struct ia_css_pipeline_stage_desc`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.