drivers/staging/media/atomisp/pci/sh_css_mmu.c
Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/sh_css_mmu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/atomisp/pci/sh_css_mmu.c- Extension
.c- Size
- 1332 bytes
- Lines
- 52
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ia_css_mmu.hia_css_mmu_private.hia_css_debug.hsh_css_sp.hsh_css_firmware.hsp.hmmu_device.h
Detected Declarations
function Copyrightfunction sh_css_mmu_set_page_table_base_index
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Support for Intel Camera Imaging ISP subsystem.
* Copyright (c) 2015, Intel Corporation.
*/
#include "ia_css_mmu.h"
#include "ia_css_mmu_private.h"
#include <ia_css_debug.h>
#include "sh_css_sp.h"
#include "sh_css_firmware.h"
#include "sp.h"
#include "mmu_device.h"
void
ia_css_mmu_invalidate_cache(void)
{
const struct ia_css_fw_info *fw = &sh_css_sp_fw;
unsigned int HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb;
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
"ia_css_mmu_invalidate_cache() enter\n");
/* if the SP is not running we should not access its dmem */
if (sh_css_sp_is_running()) {
HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb = fw->info.sp.invalidate_tlb;
(void)HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb; /* Suppres warnings in CRUN */
sp_dmem_store_uint32(SP0_ID,
(unsigned int)sp_address_of(ia_css_dmaproxy_sp_invalidate_tlb),
true);
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
"ia_css_mmu_invalidate_cache() leave\n");
}
void
sh_css_mmu_set_page_table_base_index(hrt_data base_index)
{
int i;
IA_CSS_ENTER_PRIVATE("base_index=0x%08x\n", base_index);
for (i = 0; i < N_MMU_ID; i++) {
mmu_ID_t mmu_id = i;
mmu_set_page_table_base_index(mmu_id, base_index);
mmu_invalidate_cache(mmu_id);
}
IA_CSS_LEAVE_PRIVATE("");
}
Annotation
- Immediate include surface: `ia_css_mmu.h`, `ia_css_mmu_private.h`, `ia_css_debug.h`, `sh_css_sp.h`, `sh_css_firmware.h`, `sp.h`, `mmu_device.h`.
- Detected declarations: `function Copyright`, `function sh_css_mmu_set_page_table_base_index`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.