drivers/staging/media/atomisp/pci/system_local.c

Source file repositories/reference/linux-study-clean/drivers/staging/media/atomisp/pci/system_local.c

File Facts

System
Linux kernel
Corpus path
drivers/staging/media/atomisp/pci/system_local.c
Extension
.c
Size
4325 bytes
Lines
170
Domain
Driver Families
Bucket
drivers/staging
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Support for Intel Camera Imaging ISP subsystem.
 * Copyright (c) 2015, Intel Corporation.
 */

#include "system_local.h"

/* ISP */
const hrt_address ISP_CTRL_BASE[N_ISP_ID] = {
	0x0000000000020000ULL
};

const hrt_address ISP_DMEM_BASE[N_ISP_ID] = {
	0x0000000000200000ULL
};

const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = {
	0x0000000000100000ULL
};

/* SP */
const hrt_address SP_CTRL_BASE[N_SP_ID] = {
	0x0000000000010000ULL
};

const hrt_address SP_DMEM_BASE[N_SP_ID] = {
	0x0000000000300000ULL
};

/* MMU */
/*
 * MMU0_ID: The data MMU
 * MMU1_ID: The icache MMU
 */
const hrt_address MMU_BASE[N_MMU_ID] = {
	0x0000000000070000ULL,
	0x00000000000A0000ULL
};

/* DMA */
const hrt_address DMA_BASE[N_DMA_ID] = {
	0x0000000000040000ULL
};

const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = {
	0x00000000000CA000ULL
};

/* IRQ */
const hrt_address IRQ_BASE[N_IRQ_ID] = {
	0x0000000000000500ULL,
	0x0000000000030A00ULL,
	0x000000000008C000ULL,
	0x0000000000090200ULL
};

/*
	0x0000000000000500ULL};
 */

/* GDC */
const hrt_address GDC_BASE[N_GDC_ID] = {
	0x0000000000050000ULL,
	0x0000000000060000ULL
};

/* FIFO_MONITOR (not a subset of GP_DEVICE) */
const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = {
	0x0000000000000000ULL
};

/*
const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = {
	0x0000000000000000ULL};

const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
	0x0000000000090000ULL};
*/

/* GP_DEVICE (single base for all separate GP_REG instances) */
const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
	0x0000000000000000ULL
};

/*GP TIMER , all timer registers are inter-twined,
 * so, having multiple base addresses for
 * different timers does not help*/
const hrt_address GP_TIMER_BASE = (hrt_address)0x0000000000000600ULL;

Annotation

Implementation Notes