drivers/staging/media/meson/vdec/hevc_regs.h
Source file repositories/reference/linux-study-clean/drivers/staging/media/meson/vdec/hevc_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/meson/vdec/hevc_regs.h- Extension
.h- Size
- 7076 bytes
- Lines
- 219
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __MESON_VDEC_HEVC_REGS_H_
#define __MESON_VDEC_HEVC_REGS_H_
#define HEVC_ASSIST_MMU_MAP_ADDR 0xc024
#define HEVC_ASSIST_MBOX1_CLR_REG 0xc1d4
#define HEVC_ASSIST_MBOX1_MASK 0xc1d8
#define HEVC_ASSIST_SCRATCH_0 0xc300
#define HEVC_ASSIST_SCRATCH_1 0xc304
#define HEVC_ASSIST_SCRATCH_2 0xc308
#define HEVC_ASSIST_SCRATCH_3 0xc30c
#define HEVC_ASSIST_SCRATCH_4 0xc310
#define HEVC_ASSIST_SCRATCH_5 0xc314
#define HEVC_ASSIST_SCRATCH_6 0xc318
#define HEVC_ASSIST_SCRATCH_7 0xc31c
#define HEVC_ASSIST_SCRATCH_8 0xc320
#define HEVC_ASSIST_SCRATCH_9 0xc324
#define HEVC_ASSIST_SCRATCH_A 0xc328
#define HEVC_ASSIST_SCRATCH_B 0xc32c
#define HEVC_ASSIST_SCRATCH_C 0xc330
#define HEVC_ASSIST_SCRATCH_D 0xc334
#define HEVC_ASSIST_SCRATCH_E 0xc338
#define HEVC_ASSIST_SCRATCH_F 0xc33c
#define HEVC_ASSIST_SCRATCH_G 0xc340
#define HEVC_ASSIST_SCRATCH_H 0xc344
#define HEVC_ASSIST_SCRATCH_I 0xc348
#define HEVC_ASSIST_SCRATCH_J 0xc34c
#define HEVC_ASSIST_SCRATCH_K 0xc350
#define HEVC_ASSIST_SCRATCH_L 0xc354
#define HEVC_ASSIST_SCRATCH_M 0xc358
#define HEVC_ASSIST_SCRATCH_N 0xc35c
#define HEVC_PARSER_VERSION 0xc400
#define HEVC_STREAM_CONTROL 0xc404
#define HEVC_STREAM_START_ADDR 0xc408
#define HEVC_STREAM_END_ADDR 0xc40c
#define HEVC_STREAM_WR_PTR 0xc410
#define HEVC_STREAM_RD_PTR 0xc414
#define HEVC_STREAM_LEVEL 0xc418
#define HEVC_STREAM_FIFO_CTL 0xc41c
#define HEVC_SHIFT_CONTROL 0xc420
#define HEVC_SHIFT_STARTCODE 0xc424
#define HEVC_SHIFT_EMULATECODE 0xc428
#define HEVC_SHIFT_STATUS 0xc42c
#define HEVC_SHIFTED_DATA 0xc430
#define HEVC_SHIFT_BYTE_COUNT 0xc434
#define HEVC_SHIFT_COMMAND 0xc438
#define HEVC_ELEMENT_RESULT 0xc43c
#define HEVC_CABAC_CONTROL 0xc440
#define HEVC_PARSER_SLICE_INFO 0xc444
#define HEVC_PARSER_CMD_WRITE 0xc448
#define HEVC_PARSER_CORE_CONTROL 0xc44c
#define HEVC_PARSER_CMD_FETCH 0xc450
#define HEVC_PARSER_CMD_STATUS 0xc454
#define HEVC_PARSER_LCU_INFO 0xc458
#define HEVC_PARSER_HEADER_INFO 0xc45c
#define HEVC_PARSER_INT_CONTROL 0xc480
#define HEVC_PARSER_INT_STATUS 0xc484
#define HEVC_PARSER_IF_CONTROL 0xc488
#define HEVC_PARSER_PICTURE_SIZE 0xc48c
#define HEVC_PARSER_LCU_START 0xc490
#define HEVC_PARSER_HEADER_INFO2 0xc494
#define HEVC_PARSER_QUANT_READ 0xc498
#define HEVC_PARSER_RESERVED_27 0xc49c
#define HEVC_PARSER_CMD_SKIP_0 0xc4a0
#define HEVC_PARSER_CMD_SKIP_1 0xc4a4
#define HEVC_PARSER_CMD_SKIP_2 0xc4a8
#define HEVC_SAO_IF_STATUS 0xc4c0
#define HEVC_SAO_IF_DATA_Y 0xc4c4
#define HEVC_SAO_IF_DATA_U 0xc4c8
#define HEVC_SAO_IF_DATA_V 0xc4cc
#define HEVC_STREAM_SWAP_ADDR 0xc4d0
#define HEVC_STREAM_SWAP_CTRL 0xc4d4
#define HEVC_IQIT_IF_WAIT_CNT 0xc4d8
#define HEVC_MPRED_IF_WAIT_CNT 0xc4dc
#define HEVC_SAO_IF_WAIT_CNT 0xc4e0
#define HEVC_MPRED_VERSION 0xc800
#define HEVC_MPRED_CTRL0 0xc804
#define MPRED_CTRL0_NEW_PIC BIT(2)
#define MPRED_CTRL0_NEW_TILE BIT(3)
#define MPRED_CTRL0_NEW_SLI_SEG BIT(4)
#define MPRED_CTRL0_TMVP BIT(5)
#define MPRED_CTRL0_LDC BIT(6)
#define MPRED_CTRL0_COL_FROM_L0 BIT(7)
#define MPRED_CTRL0_ABOVE_EN BIT(9)
#define MPRED_CTRL0_MV_WR_EN BIT(10)
#define MPRED_CTRL0_MV_RD_EN BIT(11)
#define MPRED_CTRL0_BUF_LINEAR BIT(13)
Annotation
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.