drivers/staging/media/meson/vdec/vdec_hevc.c
Source file repositories/reference/linux-study-clean/drivers/staging/media/meson/vdec/vdec_hevc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/meson/vdec/vdec_hevc.c- Extension
.c- Size
- 6948 bytes
- Lines
- 257
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/firmware.hlinux/clk.hvdec_1.hvdec_helpers.hvdec_hevc.hhevc_regs.hdos_regs.h
Detected Declarations
function Copyrightfunction vdec_hevc_stbuf_initfunction vdec_hevc_conf_esparserfunction vdec_hevc_vififo_levelfunction __vdec_hevc_stopfunction vdec_hevc_stopfunction __vdec_hevc_startfunction vdec_hevc_start
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Maxime Jourdan <maxi.jourdan@wanadoo.fr>
*
* VDEC_HEVC is a video decoding block that allows decoding of
* HEVC, VP9
*/
#include <linux/firmware.h>
#include <linux/clk.h>
#include "vdec_1.h"
#include "vdec_helpers.h"
#include "vdec_hevc.h"
#include "hevc_regs.h"
#include "dos_regs.h"
/* AO Registers */
#define AO_RTI_GEN_PWR_SLEEP0 0xe8
#define AO_RTI_GEN_PWR_ISO0 0xec
#define GEN_PWR_VDEC_HEVC (BIT(7) | BIT(6))
#define GEN_PWR_VDEC_HEVC_SM1 (BIT(2))
#define MC_SIZE (4096 * 4)
static int vdec_hevc_load_firmware(struct amvdec_session *sess,
const char *fwname)
{
struct amvdec_core *core = sess->core;
struct device *dev = core->dev_dec;
const struct firmware *fw;
static void *mc_addr;
static dma_addr_t mc_addr_map;
int ret;
u32 i = 100;
ret = request_firmware(&fw, fwname, dev);
if (ret < 0) {
dev_err(dev, "Unable to request firmware %s\n", fwname);
return ret;
}
if (fw->size < MC_SIZE) {
dev_err(dev, "Firmware size %zu is too small. Expected %u.\n",
fw->size, MC_SIZE);
ret = -EINVAL;
goto release_firmware;
}
mc_addr = dma_alloc_coherent(core->dev, MC_SIZE, &mc_addr_map,
GFP_KERNEL);
if (!mc_addr) {
ret = -ENOMEM;
goto release_firmware;
}
memcpy(mc_addr, fw->data, MC_SIZE);
amvdec_write_dos(core, HEVC_MPSR, 0);
amvdec_write_dos(core, HEVC_CPSR, 0);
amvdec_write_dos(core, HEVC_IMEM_DMA_ADR, mc_addr_map);
amvdec_write_dos(core, HEVC_IMEM_DMA_COUNT, MC_SIZE / 4);
amvdec_write_dos(core, HEVC_IMEM_DMA_CTRL, (0x8000 | (7 << 16)));
while (i && (readl(core->dos_base + HEVC_IMEM_DMA_CTRL) & 0x8000))
i--;
if (i == 0) {
dev_err(dev, "Firmware load fail (DMA hang?)\n");
ret = -ENODEV;
}
dma_free_coherent(core->dev, MC_SIZE, mc_addr, mc_addr_map);
release_firmware:
release_firmware(fw);
return ret;
}
static void vdec_hevc_stbuf_init(struct amvdec_session *sess)
{
struct amvdec_core *core = sess->core;
amvdec_write_dos(core, HEVC_STREAM_CONTROL,
amvdec_read_dos(core, HEVC_STREAM_CONTROL) & ~1);
amvdec_write_dos(core, HEVC_STREAM_START_ADDR, sess->vififo_paddr);
amvdec_write_dos(core, HEVC_STREAM_END_ADDR,
sess->vififo_paddr + sess->vififo_size);
amvdec_write_dos(core, HEVC_STREAM_RD_PTR, sess->vififo_paddr);
amvdec_write_dos(core, HEVC_STREAM_WR_PTR, sess->vififo_paddr);
Annotation
- Immediate include surface: `linux/firmware.h`, `linux/clk.h`, `vdec_1.h`, `vdec_helpers.h`, `vdec_hevc.h`, `hevc_regs.h`, `dos_regs.h`.
- Detected declarations: `function Copyright`, `function vdec_hevc_stbuf_init`, `function vdec_hevc_conf_esparser`, `function vdec_hevc_vififo_level`, `function __vdec_hevc_stop`, `function vdec_hevc_stop`, `function __vdec_hevc_start`, `function vdec_hevc_start`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.