drivers/staging/media/sunxi/cedrus/cedrus_h264.c
Source file repositories/reference/linux-study-clean/drivers/staging/media/sunxi/cedrus/cedrus_h264.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/sunxi/cedrus/cedrus_h264.c- Extension
.c- Size
- 21802 bytes
- Lines
- 715
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/types.hmedia/videobuf2-dma-contig.hcedrus.hcedrus_hw.hcedrus_regs.h
Detected Declarations
struct cedrus_h264_sram_ref_picenum cedrus_h264_sram_offfunction cedrus_h264_write_sramfunction cedrus_h264_mv_col_buf_addrfunction cedrus_fill_ref_picfunction cedrus_write_frame_listfunction _cedrus_write_ref_listfunction cedrus_write_ref_list0function cedrus_write_ref_list1function cedrus_write_scaling_listsfunction cedrus_write_pred_weight_tablefunction cedrus_skip_bitsfunction cedrus_set_paramsfunction cedrus_h264_irq_statusfunction cedrus_h264_irq_clearfunction cedrus_h264_irq_disablefunction cedrus_h264_setupfunction cedrus_h264_startfunction cedrus_h264_stopfunction cedrus_h264_trigger
Annotated Snippet
struct cedrus_h264_sram_ref_pic {
__le32 top_field_order_cnt;
__le32 bottom_field_order_cnt;
__le32 frame_info;
__le32 luma_ptr;
__le32 chroma_ptr;
__le32 mv_col_top_ptr;
__le32 mv_col_bot_ptr;
__le32 reserved;
} __packed;
#define CEDRUS_H264_FRAME_NUM 18
#define CEDRUS_NEIGHBOR_INFO_BUF_SIZE (32 * SZ_1K)
#define CEDRUS_MIN_PIC_INFO_BUF_SIZE (130 * SZ_1K)
static void cedrus_h264_write_sram(struct cedrus_dev *dev,
enum cedrus_h264_sram_off off,
const void *data, size_t len)
{
const u32 *buffer = data;
size_t count = DIV_ROUND_UP(len, 4);
cedrus_write(dev, VE_AVC_SRAM_PORT_OFFSET, off << 2);
while (count--)
cedrus_write(dev, VE_AVC_SRAM_PORT_DATA, *buffer++);
}
static dma_addr_t cedrus_h264_mv_col_buf_addr(struct cedrus_buffer *buf,
unsigned int field)
{
dma_addr_t addr = buf->codec.h264.mv_col_buf_dma;
/* Adjust for the field */
addr += field * buf->codec.h264.mv_col_buf_size / 2;
return addr;
}
static void cedrus_fill_ref_pic(struct cedrus_ctx *ctx,
struct cedrus_buffer *buf,
unsigned int top_field_order_cnt,
unsigned int bottom_field_order_cnt,
struct cedrus_h264_sram_ref_pic *pic)
{
struct vb2_buffer *vbuf = &buf->m2m_buf.vb.vb2_buf;
pic->top_field_order_cnt = cpu_to_le32(top_field_order_cnt);
pic->bottom_field_order_cnt = cpu_to_le32(bottom_field_order_cnt);
pic->frame_info = cpu_to_le32(buf->codec.h264.pic_type << 8);
pic->luma_ptr = cpu_to_le32(cedrus_buf_addr(vbuf, &ctx->dst_fmt, 0));
pic->chroma_ptr = cpu_to_le32(cedrus_buf_addr(vbuf, &ctx->dst_fmt, 1));
pic->mv_col_top_ptr = cpu_to_le32(cedrus_h264_mv_col_buf_addr(buf, 0));
pic->mv_col_bot_ptr = cpu_to_le32(cedrus_h264_mv_col_buf_addr(buf, 1));
}
static int cedrus_write_frame_list(struct cedrus_ctx *ctx,
struct cedrus_run *run)
{
struct cedrus_h264_sram_ref_pic pic_list[CEDRUS_H264_FRAME_NUM];
const struct v4l2_ctrl_h264_decode_params *decode = run->h264.decode_params;
const struct v4l2_ctrl_h264_sps *sps = run->h264.sps;
struct vb2_queue *cap_q;
struct cedrus_buffer *output_buf;
struct cedrus_dev *dev = ctx->dev;
unsigned long used_dpbs = 0;
unsigned int position;
int output = -1;
unsigned int i;
cap_q = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
memset(pic_list, 0, sizeof(pic_list));
for (i = 0; i < ARRAY_SIZE(decode->dpb); i++) {
const struct v4l2_h264_dpb_entry *dpb = &decode->dpb[i];
struct cedrus_buffer *cedrus_buf;
struct vb2_buffer *buf;
if (!(dpb->flags & V4L2_H264_DPB_ENTRY_FLAG_VALID))
continue;
buf = vb2_find_buffer(cap_q, dpb->reference_ts);
if (!buf)
continue;
cedrus_buf = vb2_to_cedrus_buffer(buf);
position = cedrus_buf->codec.h264.position;
Annotation
- Immediate include surface: `linux/delay.h`, `linux/types.h`, `media/videobuf2-dma-contig.h`, `cedrus.h`, `cedrus_hw.h`, `cedrus_regs.h`.
- Detected declarations: `struct cedrus_h264_sram_ref_pic`, `enum cedrus_h264_sram_off`, `function cedrus_h264_write_sram`, `function cedrus_h264_mv_col_buf_addr`, `function cedrus_fill_ref_pic`, `function cedrus_write_frame_list`, `function _cedrus_write_ref_list`, `function cedrus_write_ref_list0`, `function cedrus_write_ref_list1`, `function cedrus_write_scaling_lists`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.