drivers/staging/media/tegra-video/csi.h
Source file repositories/reference/linux-study-clean/drivers/staging/media/tegra-video/csi.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/media/tegra-video/csi.h- Extension
.h- Size
- 5435 bytes
- Lines
- 186
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
media/media-entity.hmedia/v4l2-async.hmedia/v4l2-subdev.h
Detected Declarations
struct tegra_csistruct tegra_csi_channelstruct tpg_frameratestruct tegra_csi_opsstruct tegra_csi_socstruct tegra_csienum tegra_csi_cil_portenum tegra_csi_block
Annotated Snippet
struct tegra_csi_channel {
struct list_head list;
struct v4l2_subdev subdev;
struct media_pad pads[TEGRA_CSI_PADS_NUM];
unsigned int numpads;
struct tegra_csi *csi;
struct device_node *of_node;
u8 numgangports;
unsigned int numlanes;
u8 csi_port_nums[GANG_PORTS_MAX];
u8 pg_mode;
struct v4l2_mbus_framefmt format;
unsigned int framerate;
unsigned int h_blank;
unsigned int v_blank;
struct tegra_mipi_device *mipi;
unsigned int pixel_rate;
};
/**
* struct tpg_framerate - Tegra CSI TPG framerate configuration
*
* @frmsize: frame resolution
* @code: media bus format code
* @h_blank: horizontal blanking used for TPG
* @v_blank: vertical blanking interval used for TPG
* @framerate: framerate achieved with the corresponding blanking intervals,
* format and resolution.
*/
struct tpg_framerate {
struct v4l2_frmsize_discrete frmsize;
u32 code;
unsigned int h_blank;
unsigned int v_blank;
unsigned int framerate;
};
/**
* struct tegra_csi_ops - Tegra CSI operations
*
* @csi_start_streaming: programs csi hardware to enable streaming.
* @csi_stop_streaming: programs csi hardware to disable streaming.
* @csi_err_recover: csi hardware block recovery in case of any capture errors
* due to missing source stream or due to improper csi input from
* the external source.
*/
struct tegra_csi_ops {
int (*csi_start_streaming)(struct tegra_csi_channel *csi_chan);
void (*csi_stop_streaming)(struct tegra_csi_channel *csi_chan);
void (*csi_err_recover)(struct tegra_csi_channel *csi_chan);
};
/**
* struct tegra_csi_soc - NVIDIA Tegra CSI SoC structure
*
* @ops: csi hardware operations
* @mipi_ops: MIPI calibration operations
* @csi_max_channels: supported max streaming channels
* @clk_names: csi and cil clock names
* @num_clks: total clocks count
* @tpg_frmrate_table: csi tpg frame rate table with blanking intervals
* @tpg_frmrate_table_size: size of frame rate table
*/
struct tegra_csi_soc {
const struct tegra_csi_ops *ops;
const struct tegra_mipi_ops *mipi_ops;
unsigned int csi_max_channels;
const char * const *clk_names;
unsigned int num_clks;
const struct tpg_framerate *tpg_frmrate_table;
unsigned int tpg_frmrate_table_size;
};
#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
extern const struct tegra_csi_soc tegra20_csi_soc;
#endif
#if defined(CONFIG_ARCH_TEGRA_3x_SOC)
extern const struct tegra_csi_soc tegra30_csi_soc;
#endif
#if defined(CONFIG_ARCH_TEGRA_210_SOC)
extern const struct tegra_csi_soc tegra210_csi_soc;
#endif
/**
* struct tegra_csi - NVIDIA Tegra CSI device structure
*
* @dev: device struct
* @client: host1x_client struct
* @iomem: register base
* @clks: clock for CSI and CIL
Annotation
- Immediate include surface: `media/media-entity.h`, `media/v4l2-async.h`, `media/v4l2-subdev.h`.
- Detected declarations: `struct tegra_csi`, `struct tegra_csi_channel`, `struct tpg_framerate`, `struct tegra_csi_ops`, `struct tegra_csi_soc`, `struct tegra_csi`, `enum tegra_csi_cil_port`, `enum tegra_csi_block`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.