drivers/staging/octeon/ethernet-spi.c
Source file repositories/reference/linux-study-clean/drivers/staging/octeon/ethernet-spi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/octeon/ethernet-spi.c- Extension
.c- Size
- 6760 bytes
- Lines
- 227
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/netdevice.hlinux/interrupt.hnet/dst.hocteon-ethernet.hethernet-defines.hethernet-util.h
Detected Declarations
function cvm_oct_spxx_int_prfunction cvm_oct_stxx_int_prfunction cvm_oct_spi_spx_intfunction cvm_oct_spi_rml_interruptfunction cvm_oct_spi_enable_error_reportingfunction cvm_oct_spi_pollfunction cvm_oct_spi_initfunction cvm_oct_spi_uninit
Annotated Snippet
if ((priv->port == interface * 16) && need_retrain[interface]) {
if (cvmx_spi_restart_interface
(interface, CVMX_SPI_MODE_DUPLEX, 10) == 0) {
need_retrain[interface] = 0;
cvm_oct_spi_enable_error_reporting(interface);
}
}
/*
* The SPI4000 TWSI interface is very slow. In order
* not to bring the system to a crawl, we only poll a
* single port every second. This means negotiation
* speed changes take up to 10 seconds, but at least
* we don't waste absurd amounts of time waiting for
* TWSI.
*/
if (priv->port == spi4000_port) {
/*
* This function does nothing if it is called on an
* interface without a SPI4000.
*/
cvmx_spi4000_check_speed(interface, priv->port);
/*
* Normal ordering increments. By decrementing
* we only match once per iteration.
*/
spi4000_port--;
if (spi4000_port < 0)
spi4000_port = 10;
}
}
}
int cvm_oct_spi_init(struct net_device *dev)
{
int r;
struct octeon_ethernet *priv = netdev_priv(dev);
if (number_spi_ports == 0) {
r = request_irq(OCTEON_IRQ_RML, cvm_oct_spi_rml_interrupt,
IRQF_SHARED, "SPI", &number_spi_ports);
if (r)
return r;
}
number_spi_ports++;
if (priv->port == 0 || priv->port == 16) {
cvm_oct_spi_enable_error_reporting(INTERFACE(priv->port));
priv->poll = cvm_oct_spi_poll;
}
cvm_oct_common_init(dev);
return 0;
}
void cvm_oct_spi_uninit(struct net_device *dev)
{
int interface;
cvm_oct_common_uninit(dev);
number_spi_ports--;
if (number_spi_ports == 0) {
for (interface = 0; interface < 2; interface++) {
cvmx_write_csr(CVMX_SPXX_INT_MSK(interface), 0);
cvmx_write_csr(CVMX_STXX_INT_MSK(interface), 0);
}
free_irq(OCTEON_IRQ_RML, &number_spi_ports);
}
}
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/netdevice.h`, `linux/interrupt.h`, `net/dst.h`, `octeon-ethernet.h`, `ethernet-defines.h`, `ethernet-util.h`.
- Detected declarations: `function cvm_oct_spxx_int_pr`, `function cvm_oct_stxx_int_pr`, `function cvm_oct_spi_spx_int`, `function cvm_oct_spi_rml_interrupt`, `function cvm_oct_spi_enable_error_reporting`, `function cvm_oct_spi_poll`, `function cvm_oct_spi_init`, `function cvm_oct_spi_uninit`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.