drivers/staging/rtl8723bs/hal/hal_com.c

File Facts

System

Linux kernel

Corpus path

drivers/staging/rtl8723bs/hal/hal_com.c

Extension

.c

Size

19753 bytes

Lines

820

Domain

Driver Families

Bucket

drivers/staging

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/kernel.h
• drv_types.h
• hal_com_h2c.h
• odm_precomp.h

Detected Declarations

• function Copyright
• function rtw_hal_data_deinit
• function dump_chip_info
• function SW
• function HAL_IsLegalChannel
• function MRateToHwRate
• function HwRateToMRate
• function HalSetBrateCfg
• function _OneOutPipeMapping
• function _TwoOutPipeMapping
• function _ThreeOutPipeMapping
• function Hal_MappingOutPipe
• function hal_init_macaddr
• function rtw_init_hal_com_default_value
• function c2h_evt_clear
• function c2h_evt_read_88xx
• function rtw_get_mgntframe_raid
• function rtw_hal_update_sta_rate_mask
• function SetHwReg
• function GetHwReg
• function GetHalDefVar
• function SetHalODMVar
• function GetU1ByteIntegerFromStringInDecimal
• function rtw_hal_check_rxfifo_full
• function rtw_bb_rf_gain_offset

Annotated Snippet

if (rtw_is_channel_plan_valid(hw_chnlPlan)) {
			if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
				pHalData->bDisableSWChannelPlan = true;

			chnlPlan = hw_chnlPlan;
		}
	}

	if (
		(false == pHalData->bDisableSWChannelPlan) &&
		rtw_is_channel_plan_valid(sw_channel_plan)
	)
		chnlPlan = sw_channel_plan;

	return chnlPlan;
}

bool HAL_IsLegalChannel(struct adapter *adapter, u32 Channel)
{
	bool bLegalChannel = true;

	if ((Channel <= 14) && (Channel >= 1)) {
		if (is_supported_24g(adapter->registrypriv.wireless_mode) == false)
			bLegalChannel = false;
	} else {
		bLegalChannel = false;
	}

	return bLegalChannel;
}

u8 MRateToHwRate(u8 rate)
{
	u8 ret = DESC_RATE1M;

	switch (rate) {
	case MGN_1M:
		ret = DESC_RATE1M;
		break;
	case MGN_2M:
		ret = DESC_RATE2M;
		break;
	case MGN_5_5M:
		ret = DESC_RATE5_5M;
		break;
	case MGN_11M:
		ret = DESC_RATE11M;
		break;
	case MGN_6M:
		ret = DESC_RATE6M;
		break;
	case MGN_9M:
		ret = DESC_RATE9M;
		break;
	case MGN_12M:
		ret = DESC_RATE12M;
		break;
	case MGN_18M:
		ret = DESC_RATE18M;
		break;
	case MGN_24M:
		ret = DESC_RATE24M;
		break;
	case MGN_36M:
		ret = DESC_RATE36M;
		break;
	case MGN_48M:
		ret = DESC_RATE48M;
		break;
	case MGN_54M:
		ret = DESC_RATE54M;
		break;
	case MGN_MCS0:
		ret = DESC_RATEMCS0;
		break;
	case MGN_MCS1:
		ret = DESC_RATEMCS1;
		break;
	case MGN_MCS2:
		ret = DESC_RATEMCS2;
		break;
	case MGN_MCS3:
		ret = DESC_RATEMCS3;
		break;
	case MGN_MCS4:
		ret = DESC_RATEMCS4;
		break;
	case MGN_MCS5:
		ret = DESC_RATEMCS5;
		break;

Annotation

• Immediate include surface: `linux/kernel.h`, `drv_types.h`, `hal_com_h2c.h`, `odm_precomp.h`.
• Detected declarations: `function Copyright`, `function rtw_hal_data_deinit`, `function dump_chip_info`, `function SW`, `function HAL_IsLegalChannel`, `function MRateToHwRate`, `function HwRateToMRate`, `function HalSetBrateCfg`, `function _OneOutPipeMapping`, `function _TwoOutPipeMapping`.
• Atlas domain: Driver Families / drivers/staging.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.