drivers/staging/rtl8723bs/hal/hal_intf.c
Source file repositories/reference/linux-study-clean/drivers/staging/rtl8723bs/hal/hal_intf.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/rtl8723bs/hal/hal_intf.c- Extension
.c- Size
- 7928 bytes
- Lines
- 325
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drv_types.hhal_data.h
Detected Declarations
function Copyrightfunction rtw_hal_read_chip_infofunction rtw_hal_read_chip_versionfunction rtw_hal_def_value_initfunction rtw_hal_free_datafunction rtw_hal_dm_initfunction rtw_hal_init_opmodefunction rtw_hal_initfunction rtw_hal_deinitfunction rtw_hal_set_hwregfunction rtw_hal_get_hwregfunction rtw_hal_set_hwreg_with_buffunction rtw_hal_get_def_varfunction rtw_hal_set_odm_varfunction rtw_hal_enable_interruptfunction rtw_hal_disable_interruptfunction rtw_hal_check_ips_statusfunction rtw_hal_xmitframe_enqueuefunction rtw_hal_xmitfunction rtw_hal_mgnt_xmitfunction rtw_hal_init_xmit_privfunction rtw_hal_free_xmit_privfunction rtw_hal_init_recv_privfunction rtw_hal_free_recv_privfunction rtw_hal_update_ra_maskfunction rtw_hal_add_ra_tidfunction rtw_hal_read_bbregfunction rtw_hal_write_bbregfunction rtw_hal_read_rfregfunction rtw_hal_write_rfregfunction rtw_hal_set_chanfunction rtw_hal_set_chnl_bwfunction rtw_hal_dm_watchdogfunction rtw_hal_dm_watchdog_in_lpsfunction beacon_timing_controlfunction rtw_hal_xmit_thread_handlerfunction rtw_hal_notch_filterfunction rtw_hal_c2h_validfunction rtw_hal_c2h_handlerfunction rtw_hal_c2h_id_filter_ccxfunction rtw_hal_macid_sleepfunction rtw_hal_macid_wakeupfunction rtw_hal_fill_h2c_cmd
Annotated Snippet
if (is_multicast_ether_addr(pmgntframe->attrib.ra)) {
pmgntframe->attrib.encrypt = _BIP_;
/* pmgntframe->attrib.bswenc = true; */
} else {
pmgntframe->attrib.encrypt = _AES_;
pmgntframe->attrib.bswenc = true;
}
rtw_mgmt_xmitframe_coalesce(padapter, pmgntframe->pkt, pmgntframe);
}
return rtl8723bs_mgnt_xmit(padapter, pmgntframe);
}
s32 rtw_hal_init_xmit_priv(struct adapter *padapter)
{
return rtl8723bs_init_xmit_priv(padapter);
}
void rtw_hal_free_xmit_priv(struct adapter *padapter)
{
rtl8723bs_free_xmit_priv(padapter);
}
s32 rtw_hal_init_recv_priv(struct adapter *padapter)
{
return rtl8723bs_init_recv_priv(padapter);
}
void rtw_hal_free_recv_priv(struct adapter *padapter)
{
rtl8723bs_free_recv_priv(padapter);
}
void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level)
{
struct adapter *padapter;
struct mlme_priv *pmlmepriv;
if (!psta)
return;
padapter = psta->padapter;
pmlmepriv = &(padapter->mlmepriv);
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true)
add_ratid(padapter, psta, rssi_level);
else {
UpdateHalRAMask8723B(padapter, psta->mac_id, rssi_level);
}
}
void rtw_hal_add_ra_tid(struct adapter *padapter, u32 bitmap, u8 *arg, u8 rssi_level)
{
rtl8723b_Add_RateATid(padapter, bitmap, arg, rssi_level);
}
u32 rtw_hal_read_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask)
{
return PHY_QueryBBReg_8723B(padapter, RegAddr, BitMask);
}
void rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
{
PHY_SetBBReg_8723B(padapter, RegAddr, BitMask, Data);
}
u32 rtw_hal_read_rfreg(struct adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask)
{
return PHY_QueryRFReg_8723B(padapter, eRFPath, RegAddr, BitMask);
}
void rtw_hal_write_rfreg(struct adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
{
PHY_SetRFReg_8723B(padapter, eRFPath, RegAddr, BitMask, Data);
}
void rtw_hal_set_chan(struct adapter *padapter, u8 channel)
{
PHY_SwChnl8723B(padapter, channel);
}
void rtw_hal_set_chnl_bw(struct adapter *padapter, u8 channel,
enum channel_width Bandwidth, u8 Offset40, u8 Offset80)
{
PHY_SetSwChnlBWMode8723B(padapter, channel, Bandwidth, Offset40, Offset80);
}
void rtw_hal_dm_watchdog(struct adapter *padapter)
{
rtl8723b_HalDmWatchDog(padapter);
}
Annotation
- Immediate include surface: `drv_types.h`, `hal_data.h`.
- Detected declarations: `function Copyright`, `function rtw_hal_read_chip_info`, `function rtw_hal_read_chip_version`, `function rtw_hal_def_value_init`, `function rtw_hal_free_data`, `function rtw_hal_dm_init`, `function rtw_hal_init_opmode`, `function rtw_hal_init`, `function rtw_hal_deinit`, `function rtw_hal_set_hwreg`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.