drivers/staging/rtl8723bs/hal/sdio_halinit.c
Source file repositories/reference/linux-study-clean/drivers/staging/rtl8723bs/hal/sdio_halinit.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/rtl8723bs/hal/sdio_halinit.c- Extension
.c- Size
- 32138 bytes
- Lines
- 1232
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drv_types.hrtl8723b_hal.hhal_com_h2c.h
Detected Declarations
function Copyrightfunction _InitPowerOn_8723BSfunction _init_available_page_thresholdfunction _InitQueueReservedPagefunction _InitTxBufferBoundaryfunction _InitNormalChipRegPriorityfunction _InitNormalChipOneOutEpPriorityfunction _InitNormalChipTwoOutEpPriorityfunction _InitNormalChipThreeOutEpPriorityfunction _InitQueuePriorityfunction _InitPageBoundaryfunction _InitTransferPageSizefunction _InitDriverInfoSizefunction _InitNetworkTypefunction _InitWMACSettingfunction _InitAdaptiveCtrlfunction _InitEDCAfunction _InitRetryFunctionfunction HalRxAggr8723BSdiofunction sdio_AggSettingRxUpdatefunction _initSdioAggregationSettingfunction _InitOperationModefunction _InitInterruptfunction _InitRFTypefunction _RfPowerSavefunction rtl8723bs_hal_initfunction CardDisableRTL8723BSdiofunction rtl8723bs_hal_deinitfunction rtl8723bs_init_default_valuefunction rtl8723bs_interface_configurefunction _EfuseCellSelfunction _ReadRFTypefunction Hal_EfuseParseMACAddr_8723BSfunction Hal_EfuseParseBoardType_8723BSfunction _ReadEfuseInfo8723BSfunction _ReadPROMContentfunction _ReadAdapterInfo8723BSfunction ReadAdapterInfo8723BSfunction SetHwReg8723Bfunction GetHwReg8723Bfunction SetHwRegWithBuf8723Bfunction GetHalDefVar8723BSDIO
Annotated Snippet
if (ret == _SUCCESS) {
bMacPwrCtrlOn = true;
rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
}
} else
ret = _SUCCESS;
return ret;
}
static
u8 _InitPowerOn_8723BS(struct adapter *padapter)
{
u8 value8;
u16 value16;
u32 value32;
u8 ret;
/* u8 bMacPwrCtrlOn; */
/* all of these MUST be configured before power on */
/* only cmd52 can be used before power on(card enable) */
ret = CardEnable(padapter);
if (!ret)
return _FAIL;
/* Radio-Off Pin Trigger */
value8 = rtw_read8(padapter, REG_GPIO_INTM + 1);
value8 |= BIT(1); /* Enable falling edge triggering interrupt */
rtw_write8(padapter, REG_GPIO_INTM + 1, value8);
value8 = rtw_read8(padapter, REG_GPIO_IO_SEL_2 + 1);
value8 |= BIT(1);
rtw_write8(padapter, REG_GPIO_IO_SEL_2 + 1, value8);
/* Enable power down and GPIO interrupt */
value16 = rtw_read16(padapter, REG_APS_FSMCO);
value16 |= EnPDN; /* Enable HW power down and RF on */
rtw_write16(padapter, REG_APS_FSMCO, value16);
/* Enable CMD53 R/W Operation */
/* bMacPwrCtrlOn = true; */
/* rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); */
rtw_write8(padapter, REG_CR, 0x00);
/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
value16 = rtw_read16(padapter, REG_CR);
value16 |= (
HCI_TXDMA_EN |
HCI_RXDMA_EN |
TXDMA_EN |
RXDMA_EN |
PROTOCOL_EN |
SCHEDULE_EN |
ENSEC |
CALTMR_EN
);
rtw_write16(padapter, REG_CR, value16);
hal_btcoex_PowerOnSetting(padapter);
/* external switch to S1 */
/* 0x38[11] = 0x1 */
/* 0x4c[23] = 0x1 */
/* 0x64[0] = 0 */
value16 = rtw_read16(padapter, REG_PWR_DATA);
/* Switch the control of EESK, EECS to RFC for DPDT or Antenna switch */
value16 |= BIT(11); /* BIT_EEPRPAD_RFE_CTRL_EN */
rtw_write16(padapter, REG_PWR_DATA, value16);
value32 = rtw_read32(padapter, REG_LEDCFG0);
value32 |= BIT(23); /* DPDT_SEL_EN, 1 for SW control */
rtw_write32(padapter, REG_LEDCFG0, value32);
value8 = rtw_read8(padapter, REG_PAD_CTRL1_8723B);
value8 &= ~BIT(0); /* BIT_SW_DPDT_SEL_DATA, DPDT_SEL default configuration */
rtw_write8(padapter, REG_PAD_CTRL1_8723B, value8);
return _SUCCESS;
}
/* Tx Page FIFO threshold */
static void _init_available_page_threshold(struct adapter *padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ)
{
u16 HQ_threshold, NQ_threshold, LQ_threshold;
HQ_threshold = (numPubQ + numHQ + 1) >> 1;
HQ_threshold |= (HQ_threshold << 8);
NQ_threshold = (numPubQ + numNQ + 1) >> 1;
Annotation
- Immediate include surface: `drv_types.h`, `rtl8723b_hal.h`, `hal_com_h2c.h`.
- Detected declarations: `function Copyright`, `function _InitPowerOn_8723BS`, `function _init_available_page_threshold`, `function _InitQueueReservedPage`, `function _InitTxBufferBoundary`, `function _InitNormalChipRegPriority`, `function _InitNormalChipOneOutEpPriority`, `function _InitNormalChipTwoOutEpPriority`, `function _InitNormalChipThreeOutEpPriority`, `function _InitQueuePriority`.
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.