drivers/staging/rtl8723bs/include/hal_com_reg.h
Source file repositories/reference/linux-study-clean/drivers/staging/rtl8723bs/include/hal_com_reg.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/staging/rtl8723bs/include/hal_com_reg.h- Extension
.h- Size
- 17478 bytes
- Lines
- 599
- Domain
- Driver Families
- Bucket
- drivers/staging
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __HAL_COMMON_REG_H__
#define __HAL_COMMON_REG_H__
/* */
/* */
/* 0x0000h ~ 0x00FFh System Configuration */
/* */
/* */
#define REG_SYS_FUNC_EN 0x0002
#define REG_APS_FSMCO 0x0004
#define REG_SYS_CLKR 0x0008
#define REG_9346CR 0x000A
#define REG_SYS_EEPROM_CTRL 0x000A
#define REG_RSV_CTRL 0x001C
#define REG_RF_CTRL 0x001F
#define REG_AFE_XTAL_CTRL 0x0024
#define REG_MAC_PHY_CTRL 0x002c /* for 92d, DMDP, SMSP, DMSP contrl */
#define REG_EFUSE_CTRL 0x0030
#define REG_EFUSE_TEST 0x0034
#define REG_PWR_DATA 0x0038
#define REG_GPIO_MUXCFG 0x0040
#define REG_GPIO_INTM 0x0048
#define REG_LEDCFG0 0x004C
#define REG_LEDCFG2 0x004E
#define REG_HSIMR 0x0058
#define REG_GPIO_IO_SEL_2 0x0062 /* RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. */
#define REG_MULTI_FUNC_CTRL 0x0068 /* RTL8723 WIFI/BT/GPS Multi-Function control source. */
#define REG_MCUFWDL 0x0080
#define REG_EFUSE_ACCESS 0x00CF /* Efuse access protection for RTL8723 */
#define REG_SYS_CFG 0x00F0
#define REG_GPIO_OUTSTS 0x00F4 /* For RTL8723 only. */
/* */
/* */
/* 0x0100h ~ 0x01FFh MACTOP General Configuration */
/* */
/* */
#define REG_CR 0x0100
#define REG_PBP 0x0104
#define REG_TRXDMA_CTRL 0x010C
#define REG_TRXFF_BNDY 0x0114
#define REG_HIMR 0x0120
#define REG_HISR 0x0124
#define REG_C2HEVT_MSG_NORMAL 0x01A0
#define REG_C2HEVT_CLEAR 0x01AF
#define REG_HMETFR 0x01CC
#define REG_HMEBOX_0 0x01D0
/* */
/* */
/* 0x0200h ~ 0x027Fh TXDMA Configuration */
/* */
/* */
#define REG_RQPN 0x0200
#define REG_TDECTRL 0x0208
#define REG_TXDMA_STATUS 0x0210
#define REG_RQPN_NPQ 0x0214
#define REG_AUTO_LLT 0x0224
/* */
/* */
/* 0x0280h ~ 0x02FFh RXDMA Configuration */
/* */
/* */
#define REG_RXDMA_AGG_PG_TH 0x0280
#define REG_RXPKT_NUM 0x0284
/* */
/* */
/* 0x0400h ~ 0x047Fh Protocol Configuration */
/* */
/* */
#define REG_TXPKT_EMPTY 0x041A
#define REG_FWHW_TXQ_CTRL 0x0420
#define REG_HWSEQ_CTRL 0x0423
#define REG_SPEC_SIFS 0x0428
#define REG_RL 0x042A
#define REG_RRSR 0x0440
#define REG_PKT_VO_VI_LIFE_TIME 0x04C0
#define REG_PKT_BE_BK_LIFE_TIME 0x04C2
#define REG_BAR_MODE_CTRL 0x04CC
#define REG_EARLY_MODE_CONTROL 0x04D0
#define REG_MACID_SLEEP 0x04D4
#define REG_NQOS_SEQ 0x04DC
/* */
/* */
Annotation
- Atlas domain: Driver Families / drivers/staging.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.