drivers/staging/rtl8723bs/include/rtw_xmit.h

Source file repositories/reference/linux-study-clean/drivers/staging/rtl8723bs/include/rtw_xmit.h

File Facts

System
Linux kernel
Corpus path
drivers/staging/rtl8723bs/include/rtw_xmit.h
Extension
.h
Size
12816 bytes
Lines
492
Domain
Driver Families
Bucket
drivers/staging
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct tx_desc {
	__le32 txdw0;
	__le32 txdw1;
	__le32 txdw2;
	__le32 txdw3;
	__le32 txdw4;
	__le32 txdw5;
	__le32 txdw6;
	__le32 txdw7;

#if defined(TXDESC_40_BYTES) || defined(TXDESC_64_BYTES)
	__le32 txdw8;
	__le32 txdw9;
#endif /*  TXDESC_40_BYTES */

#ifdef TXDESC_64_BYTES
	__le32 txdw10;
	__le32 txdw11;

	/*  2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now,  our descriptor */
	/*  size is 40 bytes. If you use more than 102 descriptor(103*40>4096), HW will execute */
	/*  memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor */
	/*  number or enlarge descriptor size as 64 bytes. */
	__le32 txdw12;
	__le32 txdw13;
	__le32 txdw14;
	__le32 txdw15;
#endif
};

union txdesc {
	struct tx_desc txdesc;
	unsigned int value[TXDESC_SIZE>>2];
};

struct	hw_xmit	{
	/* spinlock_t xmit_lock; */
	/* struct list_head	pending; */
	struct __queue *sta_queue;
	/* struct hw_txqueue *phwtxqueue; */
	/* signed int	txcmdcnt; */
	int	accnt;
};

/* reduce size */
struct pkt_attrib {
	u8 type;
	u8 subtype;
	u8 bswenc;
	u8 dhcp_pkt;
	u16 ether_type;
	u16 seqnum;
	u16 pkt_hdrlen;	/* the original 802.3 pkt header len */
	u16 hdrlen;		/* the WLAN Header Len */
	u32 pktlen;		/* the original 802.3 pkt raw_data len (not include ether_hdr data) */
	u32 last_txcmdsz;
	u8 nr_frags;
	u8 encrypt;	/* when 0 indicates no encryption; when non-zero, indicates the encryption algorithm */
	u8 iv_len;
	u8 icv_len;
	u8 iv[18];
	u8 icv[16];
	u8 priority;
	u8 ack_policy;
	u8 mac_id;
	u8 vcs_mode;	/* virtual carrier sense method */
	u8 dst[ETH_ALEN];
	u8 src[ETH_ALEN];
	u8 ta[ETH_ALEN];
	u8 ra[ETH_ALEN];
	u8 key_idx;
	u8 qos_en;
	u8 ht_en;
	u8 raid;/* rate adpative id */
	u8 bwmode;
	u8 ch_offset;/* PRIME_CHNL_OFFSET */
	u8 sgi;/* short GI */
	u8 ampdu_en;/* tx ampdu enable */
	u8 ampdu_spacing; /* ampdu_min_spacing for peer sta's rx */
	u8 mdata;/* more data bit */
	u8 pctrl;/* per packet txdesc control enable */
	u8 triggered;/* for ap mode handling Power Saving sta */
	u8 qsel;
	u8 order;/* order bit */
	u8 eosp;
	u8 rate;
	u8 intel_proxim;
	u8 retry_ctrl;
	u8   mbssid;
	u8 ldpc;

Annotation

Implementation Notes