drivers/tee/tstee/tstee_private.h

File Facts

System

Linux kernel

Corpus path

drivers/tee/tstee/tstee_private.h

Extension

.h

Size

2567 bytes

Lines

93

Domain

Driver Families

Bucket

drivers/tee

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/arm_ffa.h
• linux/bitops.h
• linux/tee_core.h
• linux/types.h
• linux/uuid.h
• linux/xarray.h

Detected Declarations

• struct tstee
• struct ts_session
• struct ts_context_data

Annotated Snippet

struct tstee {
	struct ffa_device *ffa_dev;
	struct tee_device *teedev;
	struct tee_shm_pool *pool;
};

struct ts_session {
	u8 iface_id;
};

struct ts_context_data {
	struct xarray sess_list;
};

#endif /* TSTEE_PRIVATE_H */

Annotation

• Immediate include surface: `linux/arm_ffa.h`, `linux/bitops.h`, `linux/tee_core.h`, `linux/types.h`, `linux/uuid.h`, `linux/xarray.h`.
• Detected declarations: `struct tstee`, `struct ts_session`, `struct ts_context_data`.
• Atlas domain: Driver Families / drivers/tee.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.