drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c

Source file repositories/reference/linux-study-clean/drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c

File Facts

System
Linux kernel
Corpus path
drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c
Extension
.c
Size
3708 bytes
Lines
160
Domain
Driver Families
Bucket
drivers/thermal
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (data & BIT_ULL(MBOX_BUSY_BIT)) {
			ret = -EBUSY;
			continue;
		}
		ret = 0;
		break;
	} while (--retries);

	return ret;
}

static int send_mbox_write_cmd(struct pci_dev *pdev, u16 id, u32 data)
{
	struct proc_thermal_device *proc_priv;
	u32 reg_data;
	int ret;

	proc_priv = pci_get_drvdata(pdev);
	ret = wait_for_mbox_ready(proc_priv);
	if (ret)
		return ret;

	writel(data, (proc_priv->mmio_base + MBOX_OFFSET_DATA));
	/* Write command register */
	reg_data = BIT_ULL(MBOX_BUSY_BIT) | id;
	writel(reg_data, (proc_priv->mmio_base + MBOX_OFFSET_INTERFACE));

	return wait_for_mbox_ready(proc_priv);
}

static int send_mbox_read_cmd(struct pci_dev *pdev, u16 id, u64 *resp)
{
	struct proc_thermal_device *proc_priv;
	u32 reg_data;
	int ret;

	proc_priv = pci_get_drvdata(pdev);
	ret = wait_for_mbox_ready(proc_priv);
	if (ret)
		return ret;

	/* Write command register */
	reg_data = BIT_ULL(MBOX_BUSY_BIT) | id;
	writel(reg_data, (proc_priv->mmio_base + MBOX_OFFSET_INTERFACE));

	ret = wait_for_mbox_ready(proc_priv);
	if (ret)
		return ret;

	if (id == MBOX_CMD_WORKLOAD_TYPE_READ)
		*resp = readl(proc_priv->mmio_base + MBOX_OFFSET_DATA);
	else
		*resp = readq(proc_priv->mmio_base + MBOX_OFFSET_DATA);

	return 0;
}

int processor_thermal_send_mbox_read_cmd(struct pci_dev *pdev, u16 id, u64 *resp)
{
	int ret;

	mutex_lock(&mbox_lock);
	ret = send_mbox_read_cmd(pdev, id, resp);
	mutex_unlock(&mbox_lock);

	return ret;
}
EXPORT_SYMBOL_NS_GPL(processor_thermal_send_mbox_read_cmd, "INT340X_THERMAL");

int processor_thermal_send_mbox_write_cmd(struct pci_dev *pdev, u16 id, u32 data)
{
	int ret;

	mutex_lock(&mbox_lock);
	ret = send_mbox_write_cmd(pdev, id, data);
	mutex_unlock(&mbox_lock);

	return ret;
}
EXPORT_SYMBOL_NS_GPL(processor_thermal_send_mbox_write_cmd, "INT340X_THERMAL");

#define MBOX_CAMARILLO_RD_INTR_CONFIG	0x1E
#define MBOX_CAMARILLO_WR_INTR_CONFIG	0x1F
#define WLT_TW_MASK			GENMASK_ULL(30, 24)
#define SOC_PREDICTION_TW_SHIFT		24

int processor_thermal_mbox_interrupt_config(struct pci_dev *pdev, bool enable,
					    int enable_bit, int time_window)
{
	u64 data;

Annotation

Implementation Notes