drivers/thermal/intel/intel_tcc.c

Source file repositories/reference/linux-study-clean/drivers/thermal/intel/intel_tcc.c

File Facts

System
Linux kernel
Corpus path
drivers/thermal/intel/intel_tcc.c
Extension
.c
Size
10418 bytes
Lines
308
Domain
Driver Families
Bucket
drivers/thermal
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

subsys_initcall(intel_tcc_init);

/**
 * intel_tcc_get_offset_mask() - Returns the bitmask to read TCC offset
 *
 * Get the model-specific bitmask to extract TCC_OFFSET from the MSR
 * TEMPERATURE_TARGET register. If the mask is 0, it means the processor does
 * not support TCC offset.
 *
 * Return: The model-specific bitmask for TCC offset.
 */
u32 intel_tcc_get_offset_mask(void)
{
	return intel_tcc_temp_masks.tcc_offset;
}
EXPORT_SYMBOL_NS(intel_tcc_get_offset_mask, "INTEL_TCC");

/**
 * get_temp_mask() - Returns the model-specific bitmask for temperature
 *
 * @pkg: true: Package Thermal Sensor. false: Core Thermal Sensor.
 *
 * Get the model-specific bitmask to extract the temperature reading from the
 * MSR_IA32_[PACKAGE]_THERM_STATUS register.
 *
 * Callers must check if the thermal status registers are supported.
 *
 * Return: The model-specific bitmask for temperature reading
 */
static u32 get_temp_mask(bool pkg)
{
	return pkg ? intel_tcc_temp_masks.pkg_digital_readout :
	       intel_tcc_temp_masks.digital_readout;
}

/**
 * intel_tcc_get_tjmax() - returns the default TCC activation Temperature
 * @cpu: cpu that the MSR should be run on, negative value means any cpu.
 *
 * Get the TjMax value, which is the default thermal throttling or TCC
 * activation temperature in degrees C.
 *
 * Return: Tjmax value in degrees C on success, negative error code otherwise.
 */
int intel_tcc_get_tjmax(int cpu)
{
	struct msr msrval;
	int val, err;

	if (cpu < 0)
		err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &msrval.l, &msrval.h);
	else
		err = rdmsrq_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &msrval.q);
	if (err)
		return err;

	val = (msrval.l >> 16) & 0xff;

	return val ? val : -ENODATA;
}
EXPORT_SYMBOL_NS_GPL(intel_tcc_get_tjmax, "INTEL_TCC");

/**
 * intel_tcc_get_offset() - returns the TCC Offset value to Tjmax
 * @cpu: cpu that the MSR should be run on, negative value means any cpu.
 *
 * Get the TCC offset value to Tjmax. The effective thermal throttling or TCC
 * activation temperature equals "Tjmax" - "TCC Offset", in degrees C.
 *
 * Return: Tcc offset value in degrees C on success, negative error code otherwise.
 */
int intel_tcc_get_offset(int cpu)
{
	struct msr val;
	int err;

	if (cpu < 0)
		err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &val.l, &val.h);
	else
		err = rdmsrq_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &val.q);
	if (err)
		return err;

	return (val.l >> 24) & intel_tcc_temp_masks.tcc_offset;
}
EXPORT_SYMBOL_NS_GPL(intel_tcc_get_offset, "INTEL_TCC");

/**
 * intel_tcc_set_offset() - set the TCC offset value to Tjmax
 * @cpu: cpu that the MSR should be run on, negative value means any cpu.

Annotation

Implementation Notes