drivers/thermal/qcom/qcom-spmi-adc-tm5.c
Source file repositories/reference/linux-study-clean/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/thermal/qcom/qcom-spmi-adc-tm5.c- Extension
.c- Size
- 29153 bytes
- Lines
- 1072
- Domain
- Driver Families
- Bucket
- drivers/thermal
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/iio/adc/qcom-vadc-common.hlinux/iio/consumer.hlinux/interrupt.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/regmap.hlinux/thermal.hlinux/unaligned.h../thermal_hwmon.h
Detected Declarations
struct adc_tm5_chipstruct adc_tm5_channelstruct adc_tm5_datastruct adc_tm5_channelstruct adc_tm5_chipenum adc5_timer_selectenum adc5_genenum adc_tm5_cal_methodenum adc_tm_gen2_time_selectfunction adc_tm5_readfunction adc_tm5_writefunction adc_tm5_reg_updatefunction adc_tm5_isrfunction adc_tm5_gen2_isrfunction adc_tm5_get_tempfunction adc_tm5_disable_channelfunction adc_tm5_gen2_conv_reqfunction adc_tm5_gen2_disable_channelfunction adc_tm5_enablefunction adc_tm5_configurefunction adc_tm5_gen2_configurefunction adc_tm5_set_tripsfunction adc_tm5_register_tzdfunction adc_tm_hc_initfunction adc_tm5_initfunction adc_tm5_gen2_initfunction adc_tm5_get_dt_channel_datafunction adc_tm5_get_dt_datafunction for_each_available_child_of_node_scopedfunction adc_tm5_probe
Annotated Snippet
struct adc_tm5_data {
const u32 full_scale_code_volt;
unsigned int *decimation;
unsigned int *hw_settle;
int (*disable_channel)(struct adc_tm5_channel *channel);
int (*configure)(struct adc_tm5_channel *channel, int low, int high);
irqreturn_t (*isr)(int irq, void *data);
int (*init)(struct adc_tm5_chip *chip);
char *irq_name;
int gen;
};
/**
* struct adc_tm5_channel - ADC Thermal Monitoring channel data.
* @channel: channel number.
* @adc_channel: corresponding ADC channel number.
* @cal_method: calibration method.
* @prescale: channel scaling performed on the input signal.
* @hw_settle_time: the time between AMUX being configured and the
* start of conversion.
* @decimation: sampling rate supported for the channel.
* @avg_samples: ability to provide single result from the ADC
* that is an average of multiple measurements.
* @high_thr_en: channel upper voltage threshold enable state.
* @low_thr_en: channel lower voltage threshold enable state.
* @meas_en: recurring measurement enable state
* @iio: IIO channel instance used by this channel.
* @chip: ADC TM chip instance.
* @tzd: thermal zone device used by this channel.
*/
struct adc_tm5_channel {
unsigned int channel;
unsigned int adc_channel;
enum adc_tm5_cal_method cal_method;
unsigned int prescale;
unsigned int hw_settle_time;
unsigned int decimation; /* For Gen2 ADC_TM */
unsigned int avg_samples; /* For Gen2 ADC_TM */
bool high_thr_en; /* For Gen2 ADC_TM */
bool low_thr_en; /* For Gen2 ADC_TM */
bool meas_en; /* For Gen2 ADC_TM */
struct iio_channel *iio;
struct adc_tm5_chip *chip;
struct thermal_zone_device *tzd;
};
/**
* struct adc_tm5_chip - ADC Thermal Monitoring properties
* @regmap: SPMI ADC5 Thermal Monitoring peripheral register map field.
* @dev: SPMI ADC5 device.
* @data: software configuration data.
* @channels: array of ADC TM channel data.
* @nchannels: amount of channels defined/allocated
* @decimation: sampling rate supported for the channel.
* Applies to all channels, used only on Gen1 ADC_TM.
* @avg_samples: ability to provide single result from the ADC
* that is an average of multiple measurements. Applies to all
* channels, used only on Gen1 ADC_TM.
* @base: base address of TM registers.
* @adc_mutex_lock: ADC_TM mutex lock, used only on Gen2 ADC_TM.
* It is used to ensure only one ADC channel configuration
* is done at a time using the shared set of configuration
* registers.
*/
struct adc_tm5_chip {
struct regmap *regmap;
struct device *dev;
const struct adc_tm5_data *data;
struct adc_tm5_channel *channels;
unsigned int nchannels;
unsigned int decimation;
unsigned int avg_samples;
u16 base;
struct mutex adc_mutex_lock;
};
static int adc_tm5_read(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len)
{
return regmap_bulk_read(adc_tm->regmap, adc_tm->base + offset, data, len);
}
static int adc_tm5_write(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len)
{
return regmap_bulk_write(adc_tm->regmap, adc_tm->base + offset, data, len);
}
static int adc_tm5_reg_update(struct adc_tm5_chip *adc_tm, u16 offset, u8 mask, u8 val)
{
return regmap_write_bits(adc_tm->regmap, adc_tm->base + offset, mask, val);
}
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/iio/adc/qcom-vadc-common.h`, `linux/iio/consumer.h`, `linux/interrupt.h`, `linux/module.h`, `linux/of.h`, `linux/platform_device.h`, `linux/regmap.h`.
- Detected declarations: `struct adc_tm5_chip`, `struct adc_tm5_channel`, `struct adc_tm5_data`, `struct adc_tm5_channel`, `struct adc_tm5_chip`, `enum adc5_timer_select`, `enum adc5_gen`, `enum adc_tm5_cal_method`, `enum adc_tm_gen2_time_select`, `function adc_tm5_read`.
- Atlas domain: Driver Families / drivers/thermal.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.