drivers/tty/serial/atmel_serial.h

Source file repositories/reference/linux-study-clean/drivers/tty/serial/atmel_serial.h

File Facts

System
Linux kernel
Corpus path
drivers/tty/serial/atmel_serial.h
Extension
.h
Size
8725 bytes
Lines
172
Domain
Driver Families
Bucket
drivers/tty
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <linux/bitfield.h>

#ifndef ATMEL_SERIAL_H
#define ATMEL_SERIAL_H

#define ATMEL_US_CR		0x00	/* Control Register */
#define	ATMEL_US_RSTRX		BIT(2)	/* Reset Receiver */
#define	ATMEL_US_RSTTX		BIT(3)	/* Reset Transmitter */
#define	ATMEL_US_RXEN		BIT(4)	/* Receiver Enable */
#define	ATMEL_US_RXDIS		BIT(5)	/* Receiver Disable */
#define	ATMEL_US_TXEN		BIT(6)	/* Transmitter Enable */
#define	ATMEL_US_TXDIS		BIT(7)	/* Transmitter Disable */
#define	ATMEL_US_RSTSTA		BIT(8)	/* Reset Status Bits */
#define	ATMEL_US_STTBRK		BIT(9)	/* Start Break */
#define	ATMEL_US_STPBRK		BIT(10)	/* Stop Break */
#define	ATMEL_US_STTTO		BIT(11)	/* Start Time-out */
#define	ATMEL_US_SENDA		BIT(12)	/* Send Address */
#define	ATMEL_US_RSTIT		BIT(13)	/* Reset Iterations */
#define	ATMEL_US_RSTNACK	BIT(14)	/* Reset Non Acknowledge */
#define	ATMEL_US_RETTO		BIT(15)	/* Rearm Time-out */
#define	ATMEL_US_DTREN		BIT(16)	/* Data Terminal Ready Enable */
#define	ATMEL_US_DTRDIS		BIT(17)	/* Data Terminal Ready Disable */
#define	ATMEL_US_RTSEN		BIT(18)	/* Request To Send Enable */
#define	ATMEL_US_RTSDIS		BIT(19)	/* Request To Send Disable */
#define	ATMEL_US_TXFCLR		BIT(24)	/* Transmit FIFO Clear */
#define	ATMEL_US_RXFCLR		BIT(25)	/* Receive FIFO Clear */
#define	ATMEL_US_TXFLCLR	BIT(26)	/* Transmit FIFO Lock Clear */
#define	ATMEL_US_FIFOEN		BIT(30)	/* FIFO enable */
#define	ATMEL_US_FIFODIS	BIT(31)	/* FIFO disable */

#define ATMEL_US_MR		0x04	/* Mode Register */
#define	ATMEL_US_USMODE		GENMASK(3, 0)	/* Mode of the USART */
#define		ATMEL_US_USMODE_NORMAL		FIELD_PREP(ATMEL_US_USMODE, 0)
#define		ATMEL_US_USMODE_RS485		FIELD_PREP(ATMEL_US_USMODE, 1)
#define		ATMEL_US_USMODE_HWHS		FIELD_PREP(ATMEL_US_USMODE, 2)
#define		ATMEL_US_USMODE_MODEM		FIELD_PREP(ATMEL_US_USMODE, 3)
#define		ATMEL_US_USMODE_ISO7816_T0	FIELD_PREP(ATMEL_US_USMODE, 4)
#define		ATMEL_US_USMODE_ISO7816_T1	FIELD_PREP(ATMEL_US_USMODE, 6)
#define		ATMEL_US_USMODE_IRDA		FIELD_PREP(ATMEL_US_USMODE, 8)
#define	ATMEL_US_USCLKS		GENMASK(5, 4)	/* Clock Selection */
#define		ATMEL_US_USCLKS_MCK		FIELD_PREP(ATMEL_US_USCLKS, 0)
#define		ATMEL_US_USCLKS_MCK_DIV8	FIELD_PREP(ATMEL_US_USCLKS, 1)
#define		ATMEL_US_USCLKS_GCLK		FIELD_PREP(ATMEL_US_USCLKS, 2)
#define		ATMEL_US_USCLKS_SCK		FIELD_PREP(ATMEL_US_USCLKS, 3)
#define	ATMEL_UA_FILTER		BIT(4)
#define	ATMEL_US_CHRL		GENMASK(7, 6)	/* Character Length */
#define		ATMEL_US_CHRL_5			FIELD_PREP(ATMEL_US_CHRL, 0)
#define		ATMEL_US_CHRL_6			FIELD_PREP(ATMEL_US_CHRL, 1)
#define		ATMEL_US_CHRL_7			FIELD_PREP(ATMEL_US_CHRL, 2)
#define		ATMEL_US_CHRL_8			FIELD_PREP(ATMEL_US_CHRL, 3)
#define	ATMEL_US_SYNC		BIT(8)		/* Synchronous Mode Select */
#define	ATMEL_US_PAR		GENMASK(11, 9)	/* Parity Type */
#define		ATMEL_US_PAR_EVEN		FIELD_PREP(ATMEL_US_PAR, 0)
#define		ATMEL_US_PAR_ODD		FIELD_PREP(ATMEL_US_PAR, 1)
#define		ATMEL_US_PAR_SPACE		FIELD_PREP(ATMEL_US_PAR, 2)
#define		ATMEL_US_PAR_MARK		FIELD_PREP(ATMEL_US_PAR, 3)
#define		ATMEL_US_PAR_NONE		FIELD_PREP(ATMEL_US_PAR, 4)
#define		ATMEL_US_PAR_MULTI_DROP		FIELD_PREP(ATMEL_US_PAR, 6)
#define	ATMEL_US_NBSTOP		GENMASK(13, 12)	/* Number of Stop Bits */
#define		ATMEL_US_NBSTOP_1		FIELD_PREP(ATMEL_US_NBSTOP, 0)
#define		ATMEL_US_NBSTOP_1_5		FIELD_PREP(ATMEL_US_NBSTOP, 1)
#define		ATMEL_US_NBSTOP_2		FIELD_PREP(ATMEL_US_NBSTOP, 2)
#define	ATMEL_UA_BRSRCCK	BIT(12)	/* Clock Selection for UART */
#define	ATMEL_US_CHMODE		GENMASK(15, 14)	/* Channel Mode */
#define		ATMEL_US_CHMODE_NORMAL		FIELD_PREP(ATMEL_US_CHMODE, 0)
#define		ATMEL_US_CHMODE_ECHO		FIELD_PREP(ATMEL_US_CHMODE, 1)
#define		ATMEL_US_CHMODE_LOC_LOOP	FIELD_PREP(ATMEL_US_CHMODE, 2)
#define		ATMEL_US_CHMODE_REM_LOOP	FIELD_PREP(ATMEL_US_CHMODE, 3)
#define	ATMEL_US_MSBF		BIT(16)	/* Bit Order */
#define	ATMEL_US_MODE9		BIT(17)	/* 9-bit Character Length */
#define	ATMEL_US_CLKO		BIT(18)	/* Clock Output Select */
#define	ATMEL_US_OVER		BIT(19)	/* Oversampling Mode */
#define	ATMEL_US_INACK		BIT(20)	/* Inhibit Non Acknowledge */
#define	ATMEL_US_DSNACK		BIT(21)	/* Disable Successive NACK */
#define	ATMEL_US_MAX_ITER_MASK	GENMASK(26, 24)	/* Max Iterations */
#define	ATMEL_US_MAX_ITER(n)	FIELD_PREP(ATMEL_US_MAX_ITER_MASK, (n))
#define	ATMEL_US_FILTER		BIT(28)	/* Infrared Receive Line Filter */

#define ATMEL_US_IER		0x08	/* Interrupt Enable Register */
#define	ATMEL_US_RXRDY		BIT(0)	/* Receiver Ready */
#define	ATMEL_US_TXRDY		BIT(1)	/* Transmitter Ready */
#define	ATMEL_US_RXBRK		BIT(2)	/* Break Received / End of Break */
#define	ATMEL_US_ENDRX		BIT(3)	/* End of Receiver Transfer */
#define	ATMEL_US_ENDTX		BIT(4)	/* End of Transmitter Transfer */
#define	ATMEL_US_OVRE		BIT(5)	/* Overrun Error */
#define	ATMEL_US_FRAME		BIT(6)	/* Framing Error */
#define	ATMEL_US_PARE		BIT(7)	/* Parity Error */
#define	ATMEL_US_TIMEOUT	BIT(8)	/* Receiver Time-out */
#define	ATMEL_US_TXEMPTY	BIT(9)	/* Transmitter Empty */
#define	ATMEL_US_ITERATION	BIT(10)	/* Max number of Repetitions Reached */

Annotation

Implementation Notes