drivers/tty/serial/pch_uart.c
Source file repositories/reference/linux-study-clean/drivers/tty/serial/pch_uart.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/tty/serial/pch_uart.c- Extension
.c- Size
- 48033 bytes
- Lines
- 1888
- Domain
- Driver Families
- Bucket
- drivers/tty
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/serial.hlinux/serial_reg.hlinux/slab.hlinux/module.hlinux/pci.hlinux/console.hlinux/serial_core.hlinux/tty.hlinux/tty_flip.hlinux/interrupt.hlinux/io.hlinux/dmi.hlinux/nmi.hlinux/delay.hlinux/of.hlinux/debugfs.hlinux/dmaengine.hlinux/pch_dma.h
Detected Declarations
struct pch_uart_bufferstruct eg20t_portstruct pch_uart_driver_dataenum pch_uart_num_tfunction port_show_regsfunction pch_uart_get_uartclkfunction pch_uart_hal_enable_interruptfunction pch_uart_hal_disable_interruptfunction pch_uart_hal_set_linefunction pch_uart_hal_fifo_resetfunction pch_uart_hal_set_fifofunction pch_uart_hal_get_modemfunction pch_uart_hal_readfunction pch_uart_hal_get_iidfunction pch_uart_hal_get_line_statusfunction pch_uart_hal_set_breakfunction push_rxfunction dma_push_rxfunction pch_free_dmafunction filterfunction pch_request_dmafunction pch_dma_rx_completefunction pch_dma_tx_completefunction handle_rx_tofunction dma_handle_rxfunction handle_txfunction dma_handle_txfunction pch_uart_err_irfunction pch_uart_interruptfunction pch_uart_tx_emptyfunction pch_uart_get_mctrlfunction pch_uart_set_mctrlfunction pch_uart_stop_txfunction pch_uart_start_txfunction pch_uart_stop_rxfunction pch_uart_enable_msfunction pch_uart_break_ctlfunction pch_uart_startupfunction pch_uart_shutdownfunction pch_uart_set_termiosfunction pch_uart_release_portfunction pch_uart_request_portfunction pch_uart_config_portfunction pch_uart_verify_portfunction wait_for_xmitrfunction pch_uart_get_poll_charfunction pch_uart_put_poll_charfunction pch_console_putchar
Annotated Snippet
static const struct file_operations port_regs_ops = {
.owner = THIS_MODULE,
.open = simple_open,
.read = port_show_regs,
.llseek = default_llseek,
};
static const struct dmi_system_id pch_uart_dmi_table[] = {
{
.ident = "CM-iTC",
{
DMI_MATCH(DMI_BOARD_NAME, "CM-iTC"),
},
(void *)CMITC_UARTCLK,
},
{
.ident = "FRI2",
{
DMI_MATCH(DMI_BIOS_VERSION, "FRI2"),
},
(void *)FRI2_64_UARTCLK,
},
{
.ident = "Fish River Island II",
{
DMI_MATCH(DMI_PRODUCT_NAME, "Fish River Island II"),
},
(void *)FRI2_48_UARTCLK,
},
{
.ident = "COMe-mTT",
{
DMI_MATCH(DMI_BOARD_NAME, "COMe-mTT"),
},
(void *)NTC1_UARTCLK,
},
{
.ident = "nanoETXexpress-TT",
{
DMI_MATCH(DMI_BOARD_NAME, "nanoETXexpress-TT"),
},
(void *)NTC1_UARTCLK,
},
{
.ident = "MinnowBoard",
{
DMI_MATCH(DMI_BOARD_NAME, "MinnowBoard"),
},
(void *)MINNOW_UARTCLK,
},
{ }
};
/* Return UART clock, checking for board specific clocks. */
static unsigned int pch_uart_get_uartclk(void)
{
const struct dmi_system_id *d;
if (user_uartclk)
return user_uartclk;
d = dmi_first_match(pch_uart_dmi_table);
if (d)
return (unsigned long)d->driver_data;
return DEFAULT_UARTCLK;
}
static void pch_uart_hal_enable_interrupt(struct eg20t_port *priv,
unsigned int flag)
{
u8 ier = ioread8(priv->membase + UART_IER);
ier |= flag & PCH_UART_IER_MASK;
iowrite8(ier, priv->membase + UART_IER);
}
static void pch_uart_hal_disable_interrupt(struct eg20t_port *priv,
unsigned int flag)
{
u8 ier = ioread8(priv->membase + UART_IER);
ier &= ~(flag & PCH_UART_IER_MASK);
iowrite8(ier, priv->membase + UART_IER);
}
static int pch_uart_hal_set_line(struct eg20t_port *priv, unsigned int baud,
unsigned int parity, unsigned int bits,
unsigned int stb)
{
unsigned int dll, dlm, lcr;
int div;
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/serial.h`, `linux/serial_reg.h`, `linux/slab.h`, `linux/module.h`, `linux/pci.h`, `linux/console.h`, `linux/serial_core.h`.
- Detected declarations: `struct pch_uart_buffer`, `struct eg20t_port`, `struct pch_uart_driver_data`, `enum pch_uart_num_t`, `function port_show_regs`, `function pch_uart_get_uartclk`, `function pch_uart_hal_enable_interrupt`, `function pch_uart_hal_disable_interrupt`, `function pch_uart_hal_set_line`, `function pch_uart_hal_fifo_reset`.
- Atlas domain: Driver Families / drivers/tty.
- Implementation status: pattern implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.