drivers/ufs/host/ufs-mediatek.h

Source file repositories/reference/linux-study-clean/drivers/ufs/host/ufs-mediatek.h

File Facts

System
Linux kernel
Corpus path
drivers/ufs/host/ufs-mediatek.h
Extension
.h
Size
5769 bytes
Lines
237
Domain
Driver Families
Bucket
drivers/ufs
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ufs_mtk_crypt_cfg {
	struct regulator *reg_vcore;
	struct clk *clk_crypt_perf;
	struct clk *clk_crypt_mux;
	struct clk *clk_crypt_lp;
	int vcore_volt;
};

struct ufs_mtk_clk {
	struct ufs_clk_info *ufs_sel_clki; /* Mux */
	struct ufs_clk_info *ufs_sel_max_clki; /* Max src */
	struct ufs_clk_info *ufs_sel_min_clki; /* Min src */
	struct ufs_clk_info *ufs_fde_clki; /* Mux */
	struct ufs_clk_info *ufs_fde_max_clki; /* Max src */
	struct ufs_clk_info *ufs_fde_min_clki; /* Min src */
	struct regulator *reg_vcore;
	int vcore_volt;
};

struct ufs_mtk_hw_ver {
	u8 step;
	u8 minor;
	u8 major;
};

struct ufs_mtk_mcq_intr_info {
	struct ufs_hba *hba;
	u32 irq;
	u8 qid;
};

struct ufs_mtk_host {
	struct phy *mphy;
	struct regulator *reg_va09;
	struct reset_control *hci_reset;
	struct reset_control *unipro_reset;
	struct reset_control *crypto_reset;
	struct reset_control *mphy_reset;
	struct ufs_hba *hba;
	struct ufs_mtk_crypt_cfg *crypt;
	struct ufs_mtk_clk mclk;
	struct ufs_mtk_hw_ver hw_ver;
	enum ufs_mtk_host_caps caps;
	bool mphy_powered_on;
	bool unipro_lpm;
	bool ref_clk_enabled;
	bool clk_scale_up;
	u16 ref_clk_ungating_wait_us;
	u16 ref_clk_gating_wait_us;
	u32 ip_ver;
	bool legacy_ip_ver;

	bool mcq_set_intr;
	bool is_mcq_intr_enabled;
	int mcq_nr_intr;
	struct ufs_mtk_mcq_intr_info mcq_intr_info[UFSHCD_MAX_Q_NR];
	struct device *phy_dev;
};

/* MTK delay of autosuspend: 500 ms */
#define MTK_RPM_AUTOSUSPEND_DELAY_MS 500

/* MTK RTT support number */
#define MTK_MAX_NUM_RTT 2

/* UFSHCI MTK ip version value */
enum {
	/* UFSHCI 3.1 */
	IP_VER_MT6983    = 0x10360000,
	IP_VER_MT6878    = 0x10420200,

	/* UFSHCI 4.0 */
	IP_VER_MT6897    = 0x10440000,
	IP_VER_MT6989    = 0x10450000,
	IP_VER_MT6899    = 0x10450100,
	IP_VER_MT6991_A0 = 0x10460000,
	IP_VER_MT6991_B0 = 0x10470000,
	IP_VER_MT6993    = 0x10480000,

	/* UFSHCI 5.0 */
	IP_VER_MT6995_A0 = 0x10490000,
	IP_VER_MT6995_B0 = 0x10500000,

	IP_VER_NONE      = 0xFFFFFFFF
};

enum ip_ver_legacy {
	IP_LEGACY_VER_MT6781 = 0x10380000,
	IP_LEGACY_VER_MT6879 = 0x10360000,
	IP_LEGACY_VER_MT6893 = 0x20160706

Annotation

Implementation Notes