drivers/usb/cdns3/cdns3-gadget.h

Source file repositories/reference/linux-study-clean/drivers/usb/cdns3/cdns3-gadget.h

File Facts

System
Linux kernel
Corpus path
drivers/usb/cdns3/cdns3-gadget.h
Extension
.h
Size
46576 bytes
Lines
1378
Domain
Driver Families
Bucket
drivers/usb
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct cdns3_usb_regs {
	__le32 usb_conf;
	__le32 usb_sts;
	__le32 usb_cmd;
	__le32 usb_itpn;
	__le32 usb_lpm;
	__le32 usb_ien;
	__le32 usb_ists;
	__le32 ep_sel;
	__le32 ep_traddr;
	__le32 ep_cfg;
	__le32 ep_cmd;
	__le32 ep_sts;
	__le32 ep_sts_sid;
	__le32 ep_sts_en;
	__le32 drbl;
	__le32 ep_ien;
	__le32 ep_ists;
	__le32 usb_pwr;
	__le32 usb_conf2;
	__le32 usb_cap1;
	__le32 usb_cap2;
	__le32 usb_cap3;
	__le32 usb_cap4;
	__le32 usb_cap5;
	__le32 usb_cap6;
	__le32 usb_cpkt1;
	__le32 usb_cpkt2;
	__le32 usb_cpkt3;
	__le32 ep_dma_ext_addr;
	__le32 buf_addr;
	__le32 buf_data;
	__le32 buf_ctrl;
	__le32 dtrans;
	__le32 tdl_from_trb;
	__le32 tdl_beh;
	__le32 ep_tdl;
	__le32 tdl_beh2;
	__le32 dma_adv_td;
	__le32 reserved1[26];
	__le32 cfg_reg1;
	__le32 dbg_link1;
	__le32 dbg_link2;
	__le32 cfg_regs[74];
	__le32 reserved2[51];
	__le32 dma_axi_ctrl;
	__le32 dma_axi_id;
	__le32 dma_axi_cap;
	__le32 dma_axi_ctrl0;
	__le32 dma_axi_ctrl1;
};

/* USB_CONF - bitmasks */
/* Reset USB device configuration. */
#define USB_CONF_CFGRST		BIT(0)
/* Set Configuration. */
#define USB_CONF_CFGSET		BIT(1)
/* Disconnect USB device in SuperSpeed. */
#define USB_CONF_USB3DIS	BIT(3)
/* Disconnect USB device in HS/FS */
#define USB_CONF_USB2DIS	BIT(4)
/* Little Endian access - default */
#define USB_CONF_LENDIAN	BIT(5)
/*
 * Big Endian access. Driver assume that byte order for
 * SFRs access always is as Little Endian so this bit
 * is not used.
 */
#define USB_CONF_BENDIAN	BIT(6)
/* Device software reset. */
#define USB_CONF_SWRST		BIT(7)
/* Singular DMA transfer mode. Only for VER < DEV_VER_V3*/
#define USB_CONF_DSING		BIT(8)
/* Multiple DMA transfers mode. Only for VER < DEV_VER_V3 */
#define USB_CONF_DMULT		BIT(9)
/* DMA clock turn-off enable. */
#define USB_CONF_DMAOFFEN	BIT(10)
/* DMA clock turn-off disable. */
#define USB_CONF_DMAOFFDS	BIT(11)
/* Clear Force Full Speed. */
#define USB_CONF_CFORCE_FS	BIT(12)
/* Set Force Full Speed. */
#define USB_CONF_SFORCE_FS	BIT(13)
/* Device enable. */
#define USB_CONF_DEVEN		BIT(14)
/* Device disable. */
#define USB_CONF_DEVDS		BIT(15)
/* L1 LPM state entry enable (used in HS/FS mode). */
#define USB_CONF_L1EN		BIT(16)
/* L1 LPM state entry disable (used in HS/FS mode). */

Annotation

Implementation Notes